Abstract: A patterning method includes: forming a first photoresist layer on a substrate; performing first divisional exposure on the first photoresist layer with first exposure energy, higher than or equal to threshold energy, using a reticle having lines and spaces of a mask pattern and an exposure apparatus; and shifting the reticle below a line width of the mask pattern and performing second divisional exposure on the first photoresist layer with second exposure energy, higher than or equal to the threshold energy, using the reticle to form a photoresist pattern. A spatial distribution of the first exposure energy may overlap a spatial distribution of the second exposure energy.

Abstract: A method for manufacturing a semiconductor device is disclosed, in which characteristics of the semiconductor device and an operation speed are improved. In forming sidewall spacers at both sides of a gate electrode, a semiconductor substrates is partially removed at both sides of the sidewall spacer by controlling an etch gas, and then a process for forming a silicide layer is performed, thereby increasing a distance between the silicide layer and a channel. Accordingly, it is possible to decrease a resistance material between the silicide layer and the channel region.

Abstract: A method for manufacturing a semiconductor device is disclosed, in which characteristics of the semiconductor device and an operation speed are improved. In forming sidewall spacers at both sides of a gate electrode, a semiconductor substrates is partially removed at both sides of the sidewall spacer by controlling an etch gas, and then a process for forming a silicide layer is performed, thereby increasing a distance between the silicide layer and a channel. Accordingly, it is possible to decrease a resistance material between the silicide layer and the channel region.

Abstract: Disclosed is a method for manufacturing semiconductor device capable of performing a low resistance in a self-align TiSi2. The method for manufacturing semiconductor device includes the steps of: a) forming a semiconductor layer including a silicon layer formed on a portion of a semiconductor substrate; b) forming a Ti layer and a TiN layer on the semiconductor layer; c) applying a first thermal treatment to the Ti layer for forming a TiSi2 layer on the semiconductor layer; d) after forming the TiSi2 layer, removing a Ti layer and the TiN layer which are not reacted; and e) applying a second thermal treatment to the TiSi2 layer for phase transition of the TiSi2 layer.