Patents by Inventor Wan Gyu Lee

Wan Gyu Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20260120738
    Abstract: A memory device includes: a memory cell, a reference memory cell, and a dual mode inverter-based write termination circuit including a write driver for writing data to the memory cell, the dual mode inverter-based write termination circuit detecting the completion of writing data to the memory cell and terminating the operation of the write driver, and also sequentially receiving an output signal of the reference memory cell and an output signal of the memory cell through one input node to sense and amplify the data stored in the memory cell.
    Type: Application
    Filed: October 24, 2025
    Publication date: April 30, 2026
    Inventors: SEONG-OOK JUNG, DO YOON LIM, DONG HAN KO, WAN GYU LEE
  • Patent number: 6855592
    Abstract: A method for manufacturing a semiconductor device is disclosed, in which characteristics of the semiconductor device and an operation speed are improved. In forming sidewall spacers at both sides of a gate electrode, a semiconductor substrates is partially removed at both sides of the sidewall spacer by controlling an etch gas, and then a process for forming a silicide layer is performed, thereby increasing a distance between the silicide layer and a channel. Accordingly, it is possible to decrease a resistance material between the silicide layer and the channel region.
    Type: Grant
    Filed: November 7, 2002
    Date of Patent: February 15, 2005
    Assignee: Hynix Semiconductor Inc.
    Inventor: Wan Gyu Lee
  • Publication number: 20030113988
    Abstract: A method for manufacturing a semiconductor device is disclosed, in which characteristics of the semiconductor device and an operation speed are improved. In forming sidewall spacers at both sides of a gate electrode, a semiconductor substrates is partially removed at both sides of the sidewall spacer by controlling an etch gas, and then a process for forming a silicide layer is performed, thereby increasing a distance between the silicide layer and a channel. Accordingly, it is possible to decrease a resistance material between the silicide layer and the channel region.
    Type: Application
    Filed: November 7, 2002
    Publication date: June 19, 2003
    Applicant: Hynix Semiconductor Inc.
    Inventor: Wan Gyu Lee