Abstract: An improved non-volatile memory and logical block to physical block address translation method utilizing a cluster based addressing scheme is detailed. The translation of logical blocks/sectors to the physical blocks/sectors is necessary for a non-volatile memory to appear as a freely rewriteable device to a system or processor. Embodiments of the present invention utilize cluster based address translation to translate logical block addresses to physical block addresses, wherein each cluster contains a plurality of sequentially addressed logical blocks. This allows the use of a smaller RAM table for the address translation lookup and/or faster scanning of the memory device or memory subsystem for the matching cluster address. In one embodiment, a specially formatted cluster is utilized for frequently updated sectors/logical blocks, where the cluster stores a single logical block and a new sequential physical block of the cluster is written in turn with each update.

Abstract: A method for managing a range of memory in a flash memory space in which a plurality of data objects are stored. A volume defined for the range of memory has a first end and second end, with a respective list of data objects associated with each end. The volume can be resized, moved, and reallocated in the flash memory space without recompilation.

Abstract: A non-volatile memory data address translation scheme is described that utilizes a hierarchal address translation system that is stored in the non-volatile memory itself. Embodiments of the present invention utilize a hierarchal address data and translation system wherein the address translation data entries are stored in one or more data structures/tables in the hierarchy, one or more of which can be updated in-place multiple times without having to overwrite data. This hierarchal address translation data structure and multiple update of data entries in the individual tables/data structures allow the hierarchal address translation data structure to be efficiently stored in a non-volatile memory array without markedly inducing write fatigue or adversely affecting the lifetime of the part. The hierarchal address translation of embodiments of the present invention also allow for an address translation layer that does not have to be resident in system RAM for operation.

Abstract: A multiple segment data structure and method manage data objects stored in multiple segments. The structure and method use one or more multiple segment index table objects containing defining information about the data objects in which the data are stored, such as the state, index table size, and one or more index tables referencing the data segment objects. The data objects themselves comprise a header, specifying information about the data segment, including a data segment state, and a data section in which data actually are stored. The state fields in the index table object and the data segment objects facilitate the data recovery process.

Abstract: A memory device driver is described that can support multiple differing memory devices, in particular, differing Flash memory devices, by being internally re-configurable to match the driving and management requirements of the particular memory device. This allows for a limited number of operating system versions to be produced and maintained for a given system by the manufacturer, reducing the possibility of misconfiguration of the system/device by the inadvertent updating or programming of the wrong operating system version by an end user or service personnel. The resulting driver routine and/or operating system is also typically smaller than operating systems/drivers that compile in or load multiple separate drivers into themselves. In one embodiment of the present invention, the software driver is automatically configures itself by querying the memory device for a device ID and/or manufacturer code or by detecting a specific characteristic of the memory device being driven.

Abstract: Non-volatile memory device, driver, and method is described that utilizes write or erase cycle tracking to interrupt or stop a non-volatile memory programming or erase operation at a selected point to interrupt/stop execution or simulate power loss at a specific point. This ability allows for a deterministic and repeatable testing process of all write or erase cycles of a non-volatile command where the state of floating gate memory cells are changed in the non-volatile memory device. Additionally, this ability to utilize write or erase cycle tracking to interrupt or stop a non-volatile memory programming operation or erasing operation at any selected point enables simulation of power loss at each point in a selected operation that a non-volatile floating gate memory cell is programmed or erased, allowing for improved, deterministic testing of the power loss recovery cycle and faster code/design change verification.

Abstract: Non-volatile memory device, driver, and method is described that utilizes write or erase cycle tracking to interrupt or stop a non-volatile memory programming or erase operation at a selected point to interrupt/stop execution or simulate power loss at a specific point. This ability allows for a deterministic and repeatable testing process of all write or erase cycles of a non-volatile command where the state of floating gate memory cells are changed in the non-volatile memory device. Additionally, this ability to utilize write or erase cycle tracking to interrupt or stop a non-volatile memory programming operation or erasing operation at any selected point enables simulation of power loss at each point in a selected operation that a non-volatile floating gate memory cell is programmed or erased, allowing for improved, deterministic testing of the power loss recovery cycle and faster code/design change verification.

Abstract: A memory device driver is described that can support multiple differing memory devices, in particular, differing Flash memory devices, by being internally re-configurable to match the driving and management requirements of the particular memory device. This allows for a limited number of operating system versions to be produced and maintained for a given system by the manufacturer, reducing the possibility of misconfiguration of the system/device by the inadvertent updating or programming of the wrong operating system version by an end user or service personnel. The resulting driver routine and/or operating system is also typically smaller than operating systems/drivers that compile in or load multiple separate drivers into themselves. In one embodiment of the present invention, the software driver is automatically configures itself by querying the memory device for a device ID and/or manufacturer code or by detecting a specific characteristic of the memory device being driven.

Abstract: A method for managing a range of memory in a flash memory space in which a plurality of data objects are stored. A volume defined for the range of memory has a first end and second end, with a respective list of data objects associated with each end. The volume can be resized, moved, and reallocated in the flash memory space without recompilation.

Abstract: A memory device driver is described that can support multiple differing memory devices, in particular, differing Flash memory devices, by being internally re-configurable to match the driving and management requirements of the particular memory device. This allows for a limited number of operating system versions to be produced and maintained for a given system by the manufacturer, reducing the possibility of misconfiguration of the system/device by the inadvertent updating or programming of the wrong operating system version by an end user or service personnel. The resulting driver routine and/or operating system is also typically smaller than operating systems/drivers that compile in or load multiple separate drivers into themselves. In one embodiment of the present invention, the software driver is automatically configures itself by querying the memory device for a device ID and/or manufacturer code or by detecting a specific characteristic of the memory device being driven.

Abstract: A method for managing a range of memory in a flash memory space in which a plurality of data objects are stored. A volume defined for the range of memory has a first end and second end, with a respective list of data objects associated with each end. The volume can be resized, moved, and reallocated in the flash memory space without recompilation.

Abstract: A single segment data structure and method for storing data objects employing a single segment data object having a header and a data record. The header includes a segment length field describing the length of memory reserved for the data record and the data record contains at least one data instance object. Each of the data instance objects has a data instance header and data field. The header includes a data instance state field and a data instance length field. The data instance length field contains data representing the length of the data instance data field allowing for variable length “in place” updating. The data instance state field contains data representing an object state of the instance data. Only one of the data instance objects of the data record of the single segment data object has a valid object state. The state field facilitates a power loss recovery process.

Abstract: A multiple segment data structure and method manage data objects stored in multiple segments. The structure and method use one or more multiple segment index table objects containing defining information about the data objects in which the data are stored, such as the state, index table size, and one or more index tables referencing the data segment objects. The data objects themselves comprise a header, specifying information about the data segment, including a data segment state, and a data section in which data actually are stored. The state fields in the index table object and the data segment objects facilitate the data recovery process.

Abstract: A single segment data structure and method for storing data objects employing a single segment data object having a header and a data record. The header includes a segment length field describing the length of memory reserved for the data record and the data record contains at least one data instance object. Each of the data instance objects has a data instance header and data field. The header includes a data instance state field and a data instance length field. The data instance length field contains data representing the length of the data instance data field allowing for variable length “in place” updating. The data instance state field contains data representing an object state of the instance data. Only one of the data instance objects of the data record of the single segment data object has a valid object state. The state field facilitates a power loss recovery process.

Abstract: A multiple segment data structure and method manage data objects stored in multiple segments. The structure and method use one or more multiple segment index table objects containing defining information about the data objects in which the data are stored, such as the state, index table size, and one or more index tables referencing the data segment objects. The data objects themselves comprise a header, specifying information about the data segment, including a data segment state, and a data section in which data actually are stored. The state fields in the index table object and the data segment objects facilitate the data recovery process.

Abstract: A non-volatile memory data address translation scheme is described that utilizes a hierarchal address translation system that is stored in the non-volatile memory itself. Embodiments of the present invention utilize a hierarchal address data and translation system wherein the address translation data entries are stored in one or more data structures/tables in the hierarchy, one or more of which can be updated in-place multiple times without having to overwrite data. This hierarchal address translation data structure and multiple update of data entries in the individual tables/data structures allow the hierarchal address translation data structure to be efficiently stored in a non-volatile memory array without markedly inducing write fatigue or adversely affecting the lifetime of the part. The hierarchal address translation of embodiments of the present invention also allow for an address translation layer that does not have to be resident in system RAM for operation.

Abstract: A non-volatile memory and erase block/data block/sector/cluster update and address translation scheme utilizing a version number is detailed that enhances data updating and helps reduce program disturb of the memory cells of the non-volatile memory device. The various embodiments utilize a version number associated with each erase block, data block, sector, and/or cluster. This allows for determination of currently valid data block, sector and/or cluster associated with the logical ID of the data grouping by locating the most recent version associated with the logical ID. With this approach, old data need not be invalidated by programming a valid/invalid flag, avoiding the risk of program disturb in the surrounding data rows.

Abstract: A linear and non-linear object management method and structure. A data structure on a computer-readable medium is used to store linear and non-linear objects in a range of memory of a volume. The data structure includes a contiguous range of memory in which the data objects are stored. A plurality of data objects are stored contiguously in the range of memory and are associated with a first or second list in the range of memory. The plurality of data objects include a first-type of data object having a data field in linear objects are stored and further include a second-type of data object having a data field containing non-linear data objects.

Abstract: A method for managing a range of memory in a flash memory space in which a plurality of data objects are stored. A volume defined for the range of memory has a first end and second end, with a respective list of data objects associated with each end. The volume can be resized, moved, and reallocated in the flash memory space without recompilation.

Abstract: A method for managing a range of memory in a flash memory space in which a plurality of data objects are stored. A volume defined for the range of memory has a first end and second end, with a respective list of data objects associated with each end. The volume can be resized, moved, and reallocated in the flash memory space without recompilation.