Abstract: A storage device and an operating method of a storage controller are provided. The storage device comprises a non-volatile memory device, each including a plurality of physical blocks, the physical block includes a plurality of sub-blocks and a storage controller including a free block list and a victim selectable block list for the plurality of physical blocks. The storage controller configured to check full reusable physical blocks in the free block list and select a head of the checked block when there are not enough free blocks for storing data in response to a write request received from a host. The storage controller further configured to perform a garbage collection based on the victim selectable block list and to transmit an address of the physical block subjected to the garbage collection to the non-volatile memory device together with the write request.

Abstract: A memory storage device is provided. The memory storage device includes: a memory device including a plurality of blocks, the plurality of blocks including a first block which includes a plurality of sub-blocks; and a memory controller configured to, based on use amount differences among the plurality of sub-blocks being greater than a threshold value, increase a use amount of a low use sub-block that has a small use amount from among the plurality of sub-blocks of the first block. The plurality of sub-blocks of the respective blocks are stacked in a direction perpendicular to a substrate of the memory device.

Abstract: The present invention relates to a pharmaceutical composition for preventing or treating diabetes mellitus in an animal of the family Canidae, including enavogliflozin as an active ingredient. The pharmaceutical composition, of the present invention, including enavogliflozin as an active ingredient exhibits an excellent blood glucose level control effect and thus can be effectively used for treating diabetes mellitus in an animal of the family Canidae.

Abstract: A storage device includes an input stage receiving a first command, a queue manager allocating a first queue entry for the first command, a pre-processor storing the first command in the first queue entry and updating a task list with the first command and a core executing the first command in accordance with an order specified in the updated task list. At least one of the queue manager and the pre-processor is implemented in a customized logic circuit.

Abstract: A method for operating a memory controller, the method including: receiving a first command from a first host; storing the first command in a queue; when the first command has a higher priority than a second command currently being performed, pausing an operation of the second command and performing a read operation of the first command; and continuing the operation of the second command after completion of the read operation of the first command.

Abstract: A method of operating a storage device including a non-volatile memory and a multi-core processor with at least two cores includes the following steps: receiving, by a host interface of the storage device, a first command from a host for requesting the non-volatile memory to perform a predetermined memory operation; generating, by a task scheduler of the storage device, first and second tasks from the first memory command; selecting, by the task scheduler, a first core from among the at least two cores based on execution times of the at least two cores; assigning, by the task scheduler, the first and second tasks to the first core; and requesting, by the first core, a subsequent task from the scheduler while the first core processes the first assigned task and loads code for processing the second task.

Abstract: A method of operating a multi-bank storage device includes transmitting a write command including stream identification information to the multi-bank storage device, and allocating at least one bank, in which data associated with the write command is to be stored, from among a plurality of banks in the multi-bank storage device, based on striping size information included within the stream identification information. Upon allocation, the data is written into the allocated at least one bank.

Abstract: A storage device includes an input stage receiving a first command, a queue manager allocating a first queue entry for the first command, a pre-processor storing the first command in the first queue entry and updating a task list with the first command and a core executing the first command in accordance with an order specified in the updated task list. At least one of the queue manager and the pre-processor is implemented in a customized logic circuit.

Abstract: A storage device includes an input stage receiving a first command, a queue manager allocating a first queue entry for the first command, a pre-processor storing the first command in the first queue entry and updating a task list with the first command and a core executing the first command in accordance with an order specified in the updated task list. At least one of the queue manager and the pre-processor is implemented in a customized logic circuit.

Abstract: A method of operating a storage device including a non-volatile memory and a multi-core processor with at least two cores includes the following steps: receiving, by a host interface of the storage device, a first command from a host for requesting the non-volatile memory to perform a predetermined memory operation; generating, by a task scheduler of the storage device, first and second tasks from the first memory command; selecting, by the task scheduler, a first core from among the at least two cores based on execution times of the at least two cores; assigning, by the task scheduler, the first and second tasks to the first core; and requesting, by the first core, a subsequent task from the scheduler while the first core processes the first assigned task and loads code for processing the second task.

Abstract: A method for operating a memory controller, the method including: receiving a first command from a first host; storing the first command in a queue; when the first command has a higher priority than a second command currently being performed, pausing an operation of the second command and performing a read operation of the first command; and continuing the operation of the second command after completion of the read operation of the first command.

Abstract: A method of operating a multi-bank storage device includes transmitting a write command including stream identification information to the multi-bank storage device, and allocating at least one bank, in which data associated with the write command is to be stored, from among a plurality of banks in the multi-bank storage device, based on striping size information included within the stream identification information. Upon allocation, the data is written into the allocated at least one bank.

Abstract: An operation method of an electronic device including a core includes reading first status information from a first status register of a first functional block driven independently of the core, reading second status information from a second status register of a second functional block driven independently of the core, reading first change information from a first flag register of the first functional block, reading second change information from a second flag register of the second functional block, determining whether an operation status of the electronic device is any one status of an idle status and a busy status, based on the read first and second status information and the read first and second change information, and operating in an operation mode corresponding to the determined operation status.

Abstract: An operating method of a storage device which includes a plurality of banks includes receiving a write command including stream identification information from a host, allocating a bank, in which data are to be stored, from among the plurality of banks based on a striping size corresponding to the stream identification information, in response to the write command, and writing the data in the allocated bank.

Abstract: A storage device includes an input stage receiving a first command, a queue manager allocating a first queue entry for the first command, a pre-processor storing the first command in the first queue entry and updating a task list with the first command and a core executing the first command in accordance with an order specified in the updated task list. At least one of the queue manager and the pre-processor is implemented in a customized logic circuit.

Abstract: An operating method of a storage device which includes a plurality of banks includes receiving a write command including stream identification information from a host, allocating a bank, in which data are to be stored, from among the plurality of banks based on a striping size corresponding to the stream identification information, in response to the write command, and writing the data in the allocated bank.

Abstract: An operation method of an electronic device including a core includes reading first status information from a first status register of a first functional block driven independently of the core, reading second status information from a second status register of a second functional block driven independently of the core, reading first change information from a first flag register of the first functional block, reading second change information from a second flag register of the second functional block, determining whether an operation status of the electronic device is any one status of an idle status and a busy status, based on the read first and second status information and the read first and second change information, and operating in an operation mode corresponding to the determined operation status.

Abstract: A method of controlling memory devices of a memory controller, the memory devices including a plurality of memory dies, includes receiving at least one data operation request and a power budget from external of the memory controller; determining respective data operation times of the plurality of memory dies, wherein a power consumption due to at least one data operation in response to the at least one data operation request may be equal to or less than the power budget; and controlling the plurality of memory dies based on the data operation times.

Abstract: A method of operating a storage device for reducing write latency. The storage device determines whether to support write data support (WDS), fetches a write command selectively including an instant write flag when WDS is supported, updates an address mapping table regarding a controller memory buffer (CMB) without an host direct memory access (HDMA) operation in response to the fetched write command, and generates write command completion message corresponding to the write command.

Abstract: A method of controlling memory devices of a memory controller, the memory devices including a plurality of memory dies, includes receiving at least one data operation request and a power budget from external of the memory controller; determining respective data operation times of the plurality of memory dies, wherein a power consumption due to at least one data operation in response to the at least one data operation request may be equal to or less than the power budget; and controlling the plurality of memory dies based on the data operation times.