Abstract: The present invention relates to utilizing individually addressable nanostructure arrays as nano electrodes for multianalyte electrochemical sensing via utilizing various electrochemical spectroscopy, capacitive and field emission techniques. In certain aspects, the invention provides devices and arrangements comprising at least two individually addressable nanostructures in an array on a substrate, and uses thereof. In other certain aspects, the invention features systems comprising the device and a chip holder, and further comprising hardware and software.

Abstract: The present invention is related to a new method for directly covalently functionalizing carbon nanotubes (CNTs) grown on or attached to a surface. The invention also features devices that are comprised of CNTs.

Abstract: Provided is an analytical device including: a self-flowing microfluidic system, having a sample extraction location, at least one sample preparation location, and at least one sample analytical chamber; wherein the sample extraction location, the sample preparation location, and the at least one sample analytical chamber are interconnected by at least one microfluidic channel on a first substrate; and a signal readout system, having at least one sample analysis elements, and a data gathering and processing element.

Abstract: A spatially selective surface functionalization device configured to generate a pattern of micro plasmas and functionalize a substrate surface may include: a pattern management system, a patterning head, and a gas delivery system, wherein the gas delivery system provides a primed gas mixture for forming a plasma between the patterning head and a target substrate below the patterning head. A patterning head may generate a distribution of micro plasmas from individual directed beams of electrons with spatial separation. A pattern management system may store and manipulate information about a pattern of surface functionalization and generate instructions for regulating a distribution of micro plasmas that functionalize a substrate surface.

Abstract: A method for manufacturing of a device (300, 410-412) comprising a substrate (201) comprising a plurality of sets of nanostructures (207) arranged on the substrate, wherein each of the sets of nanostructures is individually electrically addressable, the method comprising the steps of: providing (101) the substrate (200) having a first (202) face, the substrate having an insulating layer (210) comprising an insulating material arranged on the first face (202) of the substrate forming an interface (203) between the insulating layer and the substrate; providing (102) a plurality of stacks (204) on the substrate, the stacks being spaced apart from each other, wherein each stack comprises a first conductive layer (205) comprising a first conductive material and a second conductive layer (206) comprising a second conductive material different from the first material, the second conductive layer being arranged on the first conductive layer for catalyzing nanostructure growth; heating (103) the substrate having the p

Abstract: The present invention relates to utilizing individually addressable nanostructure arrays as nano electrodes for multianalyte electrochemical sensing via utilizing various electrochemical spectroscopy, capacitive and field emission techniques. In certain aspects, the invention provides devices and arrangements comprising at least two individually addressable nanostructures in an array on a substrate, and uses thereof. In other certain aspects, the invention features systems comprising the device and a chip holder, and further comprising hardware and software.

Abstract: A method for manufacturing of a device (300, 410-412) comprising a substrate (201) comprising a plurality of sets of nanostructures (207) arranged on the substrate, wherein each of the sets of nanostructures is individually electrically addressable, the method comprising the steps of: providing (101) the substrate (200) having a first (202) face, the substrate having an insulating layer (210) comprising an insulating material arranged on the first face (202) of the substrate forming an interface (203) between the insulating layer and the substrate; providing (102) a plurality of stacks (204) on the substrate, the stacks being spaced apart from each other, wherein each stack comprises a first conductive layer (205) comprising a first conductive material and a second conductive layer (206) comprising a second conductive material different from the first material, the second conductive layer being arranged on the first conductive layer for catalyzing nanostructure growth; heating (103) the substrate having the p

Abstract: A method for manufacturing of a device including a first substrate including a plurality of sets of nanostructures arranged on the first substrate, wherein each of the sets of nanostructures is individually electrically addressable, the method including the steps of: providing a substrate having a first face, the substrate having an insulating layer including an insulating material arranged on the first face of the substrate forming an interface between the insulating layer and the substrate; providing a plurality of stacks on the first substrate, wherein each stack includes a first conductive layer and a second conductive layer; heating the first substrate having the plurality of stacks arranged thereon in a reducing atmosphere to enable formation of nanostructures on the second conductive material; heating the first substrate having the plurality of stacks arranged thereon in an atmosphere such that nanostructures are formed on the second layer.

Abstract: An arrangement of individually addressable nanostructures (200) in an array format on a substrate (100) (non-conducting, flexible or rigid) with electrical portions (conducing) in the substrate where the electrical portions form electrical contacts with the nanostructures is utilized to form individually addressable nanostructures. The said nanostructures can be 1-1,000,000 nm in base size and range from 1-1,000,000 nm in height. The distance between the said nanostructures in the array can also range from 10-1,000,000 nm. The said nanostructures are covered in a dielectric material (300) (air, polymer, ceramic) that is at least 5-500,000 nm thicker than the height of the said nanostructures. The dielectric properties of the dielectric material are an important component in determining the capacitance/supercapacitance properties of the fingerprint device. A top electrode (400) is placed on the face of dielectric film opposite to the face in contact with the substrate where nanostructures are arranged.

Abstract: Provided is an analytical device including: a self-flowing microfluidic system, having a sample extraction location, at least one sample preparation location, and at least one sample analytical chamber; wherein the sample extraction location, the sample preparation location, and the at least one sample analytical chamber are interconnected by at least one microfluidic channel on a first substrate; and a signal readout system, having at least one sample analysis elements, and a data gathering and processing element.

Abstract: A self-flowing microfluidic analytical chip may undergo spontaneous flow of a fluidic sample through microfluidic channels without an internal or external pump or corresponding pumping support hardware for fluid pumping. A self-flowing microfluidic analytical device includes sample preparation locations, sample analysis locations, and sample extraction locations connected by a network of microfluidic channels. Self-flowing characteristics of a microfluidic analytical chip result from maskless patterning of a substrate surface, where sequential passes of a patterning head preserve, rather than destroy, a pattern of surface functionalization. Self-flowing properties may be preserved by avoiding use of mask-removing solvents common to mask-removal steps in traditional microfluidic chip manufacturing processes.

Abstract: Provided is an analytical device including: a self-flowing microfluidic system, having a sample extraction location, at least one sample preparation location, and at least one sample analytical chamber; wherein the sample extraction location, the sample preparation location, and the at least one sample analytical chamber are interconnected by at least one microfluidic channel on a first substrate; and a signal readout system, having at least one sample analysis elements, and a data gathering and processing element.

Abstract: A self-flowing microfluidic analytical chip may undergo spontaneous flow of a fluidic sample through microfluidic channels without an internal or external pump or corresponding pumping support hardware for fluid pumping. A self-flowing microfluidic analytical device includes sample preparation locations, sample analysis locations, and sample extraction locations connected by a network of microfluidic channels. Self-flowing characteristics of a microfluidic analytical chip result from maskless patterning of a substrate surface, where sequential passes of a patterning head preserve, rather than destroy, a pattern of surface functionalization. Self-flowing properties may be preserved by avoiding use of mask-removing solvents common to mask-removal steps in traditional microfluidic chip manufacturing processes.

Abstract: A spatially selective surface functionalization device configured to generate a pattern of micro plasmas and functionalize a substrate surface may include: a pattern management system, a patterning head, and a gas delivery system, wherein the gas delivery system provides a primed gas mixture for forming a plasma between the patterning head and a target substrate below the patterning head. A patterning head may generate a distribution of micro plasmas from individual directed beams of electrons with spatial separation. A pattern management system may store and manipulate information about a pattern of surface functionalization and generate instructions for regulating a distribution of micro plasmas that functionalize a substrate surface.

Abstract: A spatially selective surface functionalization device configured to generate a pattern of micro plasmas and functionalize a substrate surface may include: a pattern management system, a patterning head, and a gas delivery system, wherein the gas delivery system provides a primed gas mixture for forming a plasma between the patterning head and a target substrate below the patterning head. A patterning head may generate a distribution of micro plasmas from individual directed beams of electrons with spatial separation. A pattern management system may store and manipulate information about a pattern of surface functionalization and generate instructions for regulating a distribution of micro plasmas that functionalize a substrate surface.

Abstract: An arrangement of individually addressable nanostructures (200) in an array format on a substrate (100) (non-conducting, flexible or rigid) with electrical portions (conducing) in the substrate where the electrical portions form electrical contacts with the nanostructures is utilized to form individually addressable nanostructures. The said nanostructures can be 1-1 000 000 nm in base size and range from 1-1000 000 nm in height. The distance between the said nanostructures in the array can also range from 10-1 000 000 nm. The said nanostructures are covered in a dielectric material (300) (air, polymer, ceramic) that is at least 5-5 00 000 nm thicker than the height of the said nanostructures. The dielectric properties of the dielectric material are an important component in determining the capacitance/supercapacitance properties of the fingerprint device. A top electrode (400) is placed on the face of dielectric film opposite to the face in contact with the substrate where nanostructures are arranged.

Abstract: This disclosure provides systems, methods, and devices related to transmission electron microscopy cells for use with liquids. In one aspect a device includes a substrate, a first graphene layer, and a second graphene layer. The substrate has a first surface and a second surface. The first surface defines a first channel, a second channel, and an outlet channel. The first channel and the second channel are joined to the outlet channel. The outlet channel defines a viewport region forming a though hole in the substrate. The first graphene layer overlays the first surface of the substrate, including an interior area of the first channel, the second channel, and the outlet channel. The second graphene layer overlays the first surface of the substrate, including open regions defined by the first channel, the second channel, and the outlet channel.

Abstract: The present invention is related to a new method for directly covalently functionalizing carbon nanotubes (CNTs) grown on or attached to a surface. The invention also features devices that are comprised of CNTs.

Abstract: This disclosure provides systems, methods, and devices related to transmission electron microscopy cells for use with liquids. In one aspect a device includes a substrate, a first graphene layer, and a second graphene layer. The substrate has a first surface and a second surface. The first surface defines a first channel, a second channel, and an outlet channel. The first channel and the second channel are joined to the outlet channel. The outlet channel defines a viewport region forming a though hole in the substrate. The first graphene layer overlays the first surface of the substrate, including an interior area of the first channel, the second channel, and the outlet channel. The second graphene layer overlays the first surface of the substrate, including open regions defined by the first channel, the second channel, and the outlet channel.

Abstract: A method for manufacturing of a device including a first substrate including a plurality of sets of nanostructures arranged on the first substrate, wherein each of the sets of nanostructures is individually electrically addressable, the method including the steps of: providing a substrate having a first face, the substrate having an insulating layer including an insulating material arranged on the first face of the substrate forming an interface between the insulating layer and the substrate; providing a plurality of stacks on the first substrate, wherein each stack includes a first conductive layer and a second conductive layer; heating the first substrate having the plurality of stacks arranged thereon in a reducing atmosphere to enable formation of nanostructures on the second conductive material; heating the first substrate having the plurality of stacks arranged thereon in an atmosphere such that nanostructures are formed on the second layer.