Patents by Inventor Waqas Mumtaz Syed

Waqas Mumtaz Syed has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10957788
    Abstract: A semiconductor device includes: a semiconductor substrate having a bulk oxygen concentration of at least 6×1017 cm?3; an epitaxial layer on a first side of the semiconductor substrate, the epitaxial layer and the semiconductor substrate having a common interface; a superjunction semiconductor device structure in the epitaxial layer; and an interface region extending from the common interface into the semiconductor substrate to a depth of at least 10 ?m. A mean oxygen concentration of the interface region is lower than the bulk oxygen concentration of the semiconductor substrate.
    Type: Grant
    Filed: April 21, 2020
    Date of Patent: March 23, 2021
    Assignee: Infineon Technologies Austria AG
    Inventors: Daniel Hölzl, Henning Kraack, Gabor Mezoesi, Hans-Joachim Schulze, Waqas Mumtaz Syed
  • Publication number: 20200251580
    Abstract: A semiconductor device includes: a semiconductor substrate having a bulk oxygen concentration of at least 6×1017 cm?3; an epitaxial layer on a first side of the semiconductor substrate, the epitaxial layer and the semiconductor substrate having a common interface; a superjunction semiconductor device structure in the epitaxial layer; and an interface region extending from the common interface into the semiconductor substrate to a depth of at least 10 ?m. A mean oxygen concentration of the interface region is lower than the bulk oxygen concentration of the semiconductor substrate.
    Type: Application
    Filed: April 21, 2020
    Publication date: August 6, 2020
    Inventors: Daniel Hölzl, Henning Kraack, Gabor Mezoesi, Hans-Joachim Schulze, Waqas Mumtaz Syed
  • Patent number: 10658497
    Abstract: A method for forming semiconductor device includes providing a semiconductor substrate having an initial surface oxygen concentration in a surface region of less than 6×1017 cm?3, forming an epitaxial layer on a first side of the semiconductor substrate, and implanting dopants into the epitaxial layer. An optional thermal anneal is carried out prior to forming the epitaxial layer and/or a thermal treatment is carried out after implanting dopants.
    Type: Grant
    Filed: August 3, 2018
    Date of Patent: May 19, 2020
    Assignee: Infineon Technologies Austria AG
    Inventors: Daniel Hölzl, Henning Kraack, Gabor Mezoesi, Hans-Joachim Schulze, Waqas Mumtaz Syed
  • Patent number: 10347491
    Abstract: Disclosed is a method. The method includes implanting recombination center particles into a semiconductor body via at least one contact hole in an insulation layer formed on top of the semiconductor body, forming a contact electrode electrically connected to the semiconductor body in the at least one contact hole, and annealing the semiconductor body to diffuse the recombination center particles in the semiconductor body. Forming the contact electrode includes forming a barrier layer on sections of the semiconductor body uncovered in the at least one contact hole, wherein the barrier layer is configured to inhibit the recombination center particles from diffusing out of the semiconductor body.
    Type: Grant
    Filed: December 21, 2017
    Date of Patent: July 9, 2019
    Assignee: Infineon Technologies Austria AG
    Inventors: Wolfgang Jantscher, Alexander Binter, Oliver Blank, Petra Fischer, Ravi Keshav Joshi, Kurt Pekoll, Manfred Pippan, Andreas Riegler, Werner Schustereder, Juergen Steinbrenner, Waqas Mumtaz Syed
  • Publication number: 20190043971
    Abstract: A method for forming semiconductor device includes providing a semiconductor substrate having an initial surface oxygen concentration in a surface region of less than 6×1017 cm?3, forming an epitaxial layer on a first side of the semiconductor substrate, and implanting dopants into the epitaxial layer. An optional thermal anneal is carried out prior to forming the epitaxial layer and/or a thermal treatment is carried out after implanting dopants.
    Type: Application
    Filed: August 3, 2018
    Publication date: February 7, 2019
    Inventors: Daniel Hölzl, Henning Kraack, Gabor Mezoesi, Hans-Joachim Schulze, Waqas Mumtaz Syed
  • Publication number: 20180182629
    Abstract: Disclosed is a method. The method includes implanting recombination center particles into a semiconductor body via at least one contact hole in an insulation layer formed on top of the semiconductor body, forming a contact electrode electrically connected to the semiconductor body in the at least one contact hole, and annealing the semiconductor body to diffuse the recombination center particles in the semiconductor body. Forming the contact electrode includes forming a barrier layer on sections of the semiconductor body uncovered in the at least one contact hole, wherein the barrier layer is configured to inhibit the recombination center particles from diffusing out of the semiconductor body.
    Type: Application
    Filed: December 21, 2017
    Publication date: June 28, 2018
    Inventors: Wolfgang Jantscher, Alexander Binter, Oliver Blank, Petra Fischer, Ravi Keshav Joshi, Kurt Pekoll, Manfred Pippan, Andreas Riegler, Werner Schustereder, Juergen Steinbrenner, Waqas Mumtaz Syed
  • Publication number: 20170373140
    Abstract: A semiconductor device includes a semiconductor body with transistor cells arranged in an active area and absent in an edge area between the active area and a side surface. A field dielectric adjoins a first surface of the semiconductor body and separates, in the edge area, a conductive structure connected to gate electrodes of the transistor cells from the semiconductor body. The field dielectric includes a transition from a first vertical extension to a second, greater vertical extension. The transition is in the vertical projection of a non-depletable extension zone in the semiconductor body, wherein the non-depletable extension zone has a conductivity type of body/anode zones of the transistor cells and is electrically connected to at least one of the body/anode zones.
    Type: Application
    Filed: August 21, 2017
    Publication date: December 28, 2017
    Inventors: Franz Hirler, Stefan Gamerith, Joachim Weyers, Wolfgang Jantscher, Waqas Mumtaz Syed
  • Patent number: 9773863
    Abstract: A semiconductor device includes a semiconductor body with transistor cells arranged in an active area and absent in an edge area between the active area and a side surface. A field dielectric adjoins a first surface of the semiconductor body and separates, in the edge area, a conductive structure connected to gate electrodes of the transistor cells from the semiconductor body. The field dielectric includes a transition from a first vertical extension to a second, greater vertical extension. The transition is in the vertical projection of a non-depletable extension zone in the semiconductor body, wherein the non-depletable extension zone has a conductivity type of body/anode zones of the transistor cells and is electrically connected to at least one of the body/anode zones.
    Type: Grant
    Filed: May 14, 2014
    Date of Patent: September 26, 2017
    Assignee: Infineon Technologies Austria AG
    Inventors: Franz Hirler, Stefan Gamerith, Joachim Weyers, Wolfgang Jantscher, Waqas Mumtaz Syed
  • Publication number: 20150333168
    Abstract: A semiconductor device includes a semiconductor body with transistor cells arranged in an active area and absent in an edge area between the active area and a side surface. A field dielectric adjoins a first surface of the semiconductor body and separates, in the edge area, a conductive structure connected to gate electrodes of the transistor cells from the semiconductor body. The field dielectric includes a transition from a first vertical extension to a second, greater vertical extension. The transition is in the vertical projection of a non-depletable extension zone in the semiconductor body, wherein the non-depletable extension zone has a conductivity type of body/anode zones of the transistor cells and is electrically connected to at least one of the body/anode zones.
    Type: Application
    Filed: May 14, 2014
    Publication date: November 19, 2015
    Inventors: Franz Hirler, Stefan Gamerith, Joachim Weyers, Wolfgang Jantscher, Waqas Mumtaz Syed