Abstract: A method of fabricating a thin film resistor includes a step of sputter depositing a thin film of resistive material such as a chromium diboride compound on an insulative substrate using an argon sputter gas having a percentage of dopant such as nitrogen selected to optimize a trade off between desirably increasing the thickness of the film and undesirably increasing the temperature coefficient of resistance. A cap layer having a solid diffusant such as free chromium is deposited over the thin film of resistive material. The cap layer serves to protect the thin film of resistive material during subsequent patterning of conductors using wet etching, and also the solid diffusant diffuses into the resistive material during subsequent thermal treatment to drive the temperature coefficient of resistance back down.

Abstract: A method of making a number of semiconductor diodes on a single wafer without breakage during handling and processing, comprising the steps of forming a plurality of mesas on one surface of an intrinsic substrate, diffusing a selected first conductivity-type region into each mesa, coating the front surface of the substrate and mesas with oxide, chemically milling recesses into the opposite side of the substrate in alignment with the mesas to a predetermined depth where the mesas are each supported by a thin annular area of substrate material permitting transfer of the device into an epitaxial reactor, gas etching the recesses to a depth beyond the oxide interface to physically separate the mesas from the substrate material, growing a thin epitaxial layer of opposite conductivity type over the back surface of the device, applying ohmic contacts to the device, and separating the individual mesas.

Abstract: A metal contact system for an IGFET having shallow source and drain includes a refractory metal silicide layer forming low resistance ohmic contact to a silicon surface, a layer on the silicide layer of another refractory metal to serve as a barrier against diffusion of the interconnect metal, and a layer of interconnect metal over the diffusion barrier layer. The refractory metal layers are deposited by sputtering platinum or platinel for the first layer and titanium-tungsten for the second layer. In metal gate construction an additional layer of chromium is used as an etch resistant mask to protect the refractory metal layers from chemical attack when removing silicon nitride after it has been used initially as an oxidation mask and later as a sputtering mask.

Abstract: A semiconductor transducer chip is flip-chip bonded to a semiconductor interface chip, which is mounted on the ceramic package. Thermal coupling between the package and the transducer chip is minimized by the small contact area between the transducer chip and interface chip. Micron size spacing between the spring membrane in the transducer chip and the interface chip produces squeeze film damping of the spring membrane.

Abstract: A method of making a number of semiconductor diodes on a single wafer without breakage during handling and processing, comprising the steps of forming a plurality of mesas on one surface of an intrinsic substrate, diffusing a selected first conductivity-type region into each mesa, coating the front surface of the substrate and mesas wiyth oxide, chemically milling recesses into the opposite side of the substrate in alignment with the mesas to a predetermined depth where the mesas are each supported by a thin annular area of substrate material permitting transfer of the device into an epitaxial reactor, gas etching the recesses to a depth beyond the oxide interface to physically separate the mesas from the substrate material, growing a thin epitaxial layer of opposite conductivity type over the back surface of the device, applying ohmic contacts to the device, and separating the individual mesas.

Abstract: Vacuum sputtering apparatus for treating articles having a housing forming a main vacuum chamber with a plurality of work stations therein. A lock chamber is provided in the main vacuum chamber through which articles can be inserted and removed. Means is provided in the main vacuum chamber for advancing the articles sequentially through the work stations in the main chamber so that as articles are being removed from the lock chambers, articles which have passed through the work stations can be removed from the main vacuum chamber through the lock chamber.In the method articles are introduced into the main vacuum chamber through a lock chamber, and they are intermittently progressively advanced through a plurality of work stations in the main vacuum chamber and then are removed through the lock chamber.

Abstract: Semiconductor structure formed of a semiconductor body having a planar surface and having regions of first and second conductivity types extending to the surface and with a layer of insulating material formed on the surface. The layer of insulating material has openings formed therein exposing portions of said regions. A lead structure is adherent to the layer of insulating material and extends through the openings to make contact to the portions of the regions so that the regions form parts of an integrated circuit. The lead structure includes a layer of gold having a relatively rough surface with a roughness scale ranging from 10 to 20 microinches so that photoresist will readily adhere thereto.

Abstract: Schottky barrier diode semiconductor structure having a semiconductor body formed essentially of silicon and having a surface with an active device formed in the semiconductor body having collector, base and emitter regions and with at least two metals on said surface combining with the silicon to form an alloy of at least two metals and silicon which is in contact with the collector, base and emitter regions and also extends beyond the base region to form a Schottky barrier diode having a barrier height which is determined by the composition of the alloy.In the method, the alloy of at least the two metals in combination with the silicon is adjusted to modify the barrier height of the Schottky barrier diode so that a barrier height can be chosen ranging from between 0.64 and 0.835.