Patents by Inventor Warren S. Snyder
Warren S. Snyder has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11105851Abstract: A microcontroller comprises a plurality of digital peripheral blocks and a direct memory access (DMA) controller coupled thereto. The plurality of digital peripheral blocks includes a digital peripheral block that is configured to issue a DMA request. Upon receipt of the DMA request, the DMA controller is configured to retrieve configuration information and to write the configuration information to a configuration register associated with a circuit element of the microcontroller.Type: GrantFiled: March 17, 2020Date of Patent: August 31, 2021Assignee: Cypress Semiconductor CorporationInventors: Harold Kutz, Timothy John Williams, Bert Sullam, Warren S. Snyder, James H. Shutt, Bruce E. Byrkett, Monte Mar, Eashwar Thiagarajan, Nathan Wayne Kohagen, David G. Wright, Mark E Hastings, Dennis R. Seguine
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Publication number: 20200300910Abstract: A microcontroller comprises a plurality of digital peripheral blocks and a direct memory access (DMA) controller coupled thereto. The plurality of digital peripheral blocks includes a digital peripheral block that is configured to issue a DMA request. Upon receipt of the DMA request, the DMA controller is configured to retrieve configuration information and to write the configuration information to a configuration register associated with a circuit element of the microcontroller.Type: ApplicationFiled: March 17, 2020Publication date: September 24, 2020Applicant: Cypress Semiconductor CorporationInventors: Harold Kutz, Timothy John Williams, Bert Sullam, Warren S. Snyder, James H. Shutt, Bruce E. Byrkett, Monte Mar, Eashwar Thiagarajan, Nathan Wayne Kohagen, David G. Wright, Mark E Hastings, Dennis R. Seguine
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Patent number: 10762019Abstract: A programmable device, having an analog component coupled with an analog bus and a digital component coupled with a digital bus together with a set of 10 pads, each of which capable of being coupled to a bus line of one segment of the analog bus as well as to at least one digital bus line, and where the analog bus is capable of being used to connect a pair of the pads to each other.Type: GrantFiled: July 11, 2017Date of Patent: September 1, 2020Assignee: Cypress Semiconductor CorporationInventors: Timothy John Williams, David G. Wright, Harold M. Kutz, Eashwar Thiagarajan, Warren S. Snyder, Mark E Hastings
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Patent number: 10725954Abstract: Embodiments of the present invention are directed to a microcontroller device having a microprocessor, programmable memory components, and programmable analog and digital blocks. The programmable analog and digital blocks are configurable based on programming information stored in the memory components. Programmable interconnect logic, also programmable from the memory components, is used to couple the programmable analog and digital blocks as needed. The advanced microcontroller design also includes programmable input/output blocks for coupling selected signals to external pins. The memory components also include user programs that the embedded microprocessor executes. These programs may include instructions for programming the digital and analog blocks “on-the-fly,” e.g., dynamically. In one implementation, there are a plurality of programmable digital blocks and a plurality of programmable analog blocks.Type: GrantFiled: June 1, 2018Date of Patent: July 28, 2020Assignee: Monterey Research, LLCInventors: Warren S. Snyder, Monte Mar
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Patent number: 10634722Abstract: A programmable device comprises a plurality of programmable blocks, a debug interface coupled with the plurality of programmable blocks, a debug interface coupled with the plurality of programmable blocks, and a power manger coupled with the plurality of programmable blocks. The power manager is configured to supply power to a subset of the plurality of programmable blocks during debugging of the subset while maintaining a different subset of the plurality of programmable blocks in a lower power mode.Type: GrantFiled: May 23, 2019Date of Patent: April 28, 2020Assignee: Cypress Semiconductor CorporationInventors: Harold Kutz, Timothy John Williams, Bert Sullam, Warren S. Snyder, James H. Shutt, Bruce E. Byrkett, Monte Mar, Eashwar Thiagarajan, Nathan Wayne Kohagen, David G. Wright, Mark E Hastings, Dennis R. Seguine
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Publication number: 20190227818Abstract: A device includes an analog block array, a first analog bus segment coupled to the analog block array, a second analog bus segment coupled to the analog block array, and a third analog bus segment coupled to the analog block array. The device also includes a first I/O pin selectively couplable to the first analog bus segment, a second I/O pin selectively couplable to the second analog bus segment, and a third I/O pin selectively couplable to the third analog bus segment. A first switch is configured to selectively propagate a first analog signal on the first analog bus segment to the second analog bus segment, and a second switch is configured to selectively propagate a second analog signal on the first analog bus segment to the third analog bus segment. In a first mode of operation, the first and second switches are open. In a second mode of operation, the first switch is closed. In a third mode of operation, the second switch is closed.Type: ApplicationFiled: April 4, 2019Publication date: July 25, 2019Applicant: Cypress Semiconductor CorporationInventors: Harold M. Kutz, Warren S. Snyder, Timothy John Williams, Eashwar Thiagarajan
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Patent number: 10345377Abstract: A programmable device comprises a plurality of programmable blocks, a debug interface coupled with the plurality of programmable blocks, a debug interface coupled with the plurality of programmable blocks, and a power manger coupled with the plurality of programmable blocks. The power manager is configured to supply power to a subset of the plurality of programmable blocks during debugging of the subset while maintaining a different subset of the plurality of programmable blocks in a lower power mode.Type: GrantFiled: April 3, 2018Date of Patent: July 9, 2019Assignee: Cypress Semiconductor CorporationInventors: Harold M. Kutz, Timothy John Williams, Bert S. Sullam, Warren S. Snyder, James H. Shutt, Bruce E. Byrkett, Monte Mar, Eashwar Thiagarajan, Nathan Wayne Kohagen, David G. Wright, Mark E. Hastings, Dennis R. Seguine
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Patent number: 10261932Abstract: Embodiments of the present invention are directed to a microcontroller device having a microprocessor, programmable memory components, and programmable analog and digital blocks. The programmable analog and digital blocks are configurable based on programming information stored in the memory components. Programmable interconnect logic, also programmable from the memory components, is used to couple the programmable analog and digital blocks as needed. The advanced microcontroller design also includes programmable input/output blocks for coupling selected signals to external pins. The memory components also include user programs that the embedded microprocessor executes. These programs may include instructions for programming the digital and analog blocks “on-the-fly,” e.g., dynamically. In one implementation, there are a plurality of programmable digital blocks and a plurality of programmable analog blocks.Type: GrantFiled: March 10, 2017Date of Patent: April 16, 2019Assignee: Cypress Semiconductor CorporationInventors: Warren S. Snyder, Monte Mar
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Patent number: 10248604Abstract: Embodiments of the present invention are directed to a microcontroller device having a microprocessor, programmable memory components, and programmable analog and digital blocks. The programmable analog and digital blocks are configurable based on programming information stored in the memory components. Programmable interconnect logic, also programmable from the memory components, is used to couple the programmable analog and digital blocks as needed. The advanced microcontroller design also includes programmable input/output blocks for coupling selected signals to external pins. The memory components also include user programs that the embedded microprocessor executes. These programs may include instructions for programming the digital and analog blocks “on-the-fly,” e.g., dynamically. In one implementation, there are a plurality of programmable digital blocks and a plurality of programmable analog blocks.Type: GrantFiled: March 8, 2017Date of Patent: April 2, 2019Assignee: Cypress Semiconductor CorporationInventors: Warren S. Snyder, Monte Mar
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Publication number: 20190012287Abstract: Embodiments of the present invention are directed to a microcontroller device having a microprocessor, programmable memory components, and programmable analog and digital blocks. The programmable analog and digital blocks are configurable based on programming information stored in the memory components. Programmable interconnect logic, also programmable from the memory components, is used to couple the programmable analog and digital blocks as needed. The advanced microcontroller design also includes programmable input/output blocks for coupling selected signals to external pins. The memory components also include user programs that the embedded microprocessor executes. These programs may include instructions for programming the digital and analog blocks “on-the-fly,” e.g., dynamically. In one implementation, there are a plurality of programmable digital blocks and a plurality of programmable analog blocks.Type: ApplicationFiled: June 1, 2018Publication date: January 10, 2019Applicant: Cypress Semiconductor CorporationInventors: Warren S. Snyder, Monte Mar
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Publication number: 20180292454Abstract: A programmable device comprises a plurality of programmable blocks, a debug interface coupled with the plurality of programmable blocks, a debug interface coupled with the plurality of programmable blocks, and a power manger coupled with the plurality of programmable blocks. The power manager is configured to supply power to a subset of the plurality of programmable blocks during debugging of the subset while maintaining a different subset of the plurality of programmable blocks in a lower power mode.Type: ApplicationFiled: April 3, 2018Publication date: October 11, 2018Applicant: Cypress Semiconductor CorporationInventors: Harold M. Kutz, Timothy John Williams, Bert S. Sullam, Warren S. Snyder, James H. Shutt, Bruce E. Byrkett, Monte Mar, Eashwar Thiagarajan, Nathan Wayne Kohagen, David G. Wright, Mark E Hastings, Dennis R. Seguine
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Patent number: 10020810Abstract: An example semiconductor chip includes analog circuits, digital circuits, and a digital input port. The digital input port is to receive an input signal. The analog circuit is to receive the input signal from the digital input port and produce a digital signal based on the input signal.Type: GrantFiled: December 21, 2015Date of Patent: July 10, 2018Assignee: Cypress Semiconductor CorporationInventors: Warren S. Snyder, Monte Mar
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Patent number: 10007636Abstract: Embodiments of the present invention are directed to a microcontroller device having a microprocessor, programmable memory components, and programmable analog and digital blocks. The programmable analog and digital blocks are configurable based on programming information stored in the memory components. Programmable interconnect logic, also programmable from the memory components, is used to couple the programmable analog and digital blocks as needed. The advanced microcontroller design also includes programmable input/output blocks for coupling selected signals to external pins. The memory components also include user programs that the embedded microprocessor executes. These programs may include instructions for programming the digital and analog blocks “on-the-fly,” e.g., dynamically. In one implementation, there are a plurality of programmable digital blocks and a plurality of programmable analog blocks.Type: GrantFiled: March 10, 2017Date of Patent: June 26, 2018Assignee: Cypress Semiconductor CorporationInventors: Warren S. Snyder, Monte Mar
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Patent number: 9954528Abstract: An example semiconductor chip includes analog circuits, digital circuits, and a digital input port. The digital input port is to receive an input signal. The analog circuit is to receive the input signal from the digital input port and produce a digital signal based on the input signal.Type: GrantFiled: December 21, 2015Date of Patent: April 24, 2018Assignee: Cypress Semiconductor CorporationInventors: Warren S. Snyder, Monte Mar
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Patent number: 9952282Abstract: A programmable device comprises a plurality of programmable blocks, a debug interface coupled with the plurality of programmable blocks, and a power manager coupled with the plurality of programmable blocks. The power manager is configured to supply power to a subset of the plurality of programmable blocks during debugging of the subset while maintaining a different subset of the plurality of programmable blocks in a lower power mode.Type: GrantFiled: September 21, 2015Date of Patent: April 24, 2018Assignee: Cypress Semiconductor CorporationInventors: Harold M. Kutz, Timothy John Williams, Bert S. Sullam, Warren S. Snyder, James H. Shutt, Bruce E. Byrkett, Monte Mar, Eashwar Thiagarajan, Nathan Wayne Kohagen, David G. Wright, Mark E Hastings, Dennis R. Seguine
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Publication number: 20170371824Abstract: A programmable device, having an analog component coupled with an analog bus and a digital component coupled with a digital bus together with a set of 10 pads, each of which capable of being coupled to a bus line of one segment of the analog bus as well as to at least one digital bus line, and where the analog bus is capable of being used to connect a pair of the pads to each other.Type: ApplicationFiled: July 11, 2017Publication date: December 28, 2017Applicant: Cypress Semiconductor CorporationInventors: Timothy John Williams, David G. Wright, Harold M. Kutz, Eashwar Thiagarajan, Warren S. Snyder, Mark E Hastings
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Patent number: 9843327Abstract: A circuit with a plurality of analog circuit blocks, each configured to provide at least one analog function and a programmable interconnect coupled of the analog circuit blocks and configurable to interconnect combinations of the analog circuit blocks to one another. The circuit is formed in an integrated circuit (chip) and the programmable interconnect comprises a plurality of switches coupled between the analog circuit blocks and ports that provide signal connections for the chip.Type: GrantFiled: May 21, 2014Date of Patent: December 12, 2017Assignee: CYPRESS SEMICONDUCTOR CORPORATIONInventors: Warren S. Snyder, Monte Mar
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Publication number: 20170286344Abstract: An integrated circuit device may include a reconfigurable analog signal switching fabric comprising a plurality of global buses that are selectively connected to external pins by pin connection circuits in response to changeable analog routing data, and a plurality of local buses that are selectively connected to analog blocks and/or global buses by routing connection circuits in response to the analog routing data; and at least one processor circuit that executes predetermined operations in response to instruction data.Type: ApplicationFiled: March 20, 2017Publication date: October 5, 2017Applicant: Cypress Semiconductor CorporationInventors: Bert S. Sullam, Harold M. Kutz, Timothy John Williams, James H. Shutt, Bruce E. Byrkett, Melany Ann Richmond, Nathan Wayne Kohagen, Mark E. Hastings, Eashwar Thiagarajan, Warren S. Snyder
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Patent number: 9766650Abstract: A programmable device includes reconfigurable analog circuitry, reconfigurable digital circuitry, a plurality of input/output (I/O) blocks, and a global mapping system. The global mapping system is configured to selectively couple the plurality of I/O blocks with analog functional units of the reconfigurable analog circuitry and with digital functional units of the reconfigurable digital circuitry.Type: GrantFiled: September 25, 2015Date of Patent: September 19, 2017Assignee: CYPRESS SEMICONDUCTOR CORPORATIONInventor: Warren S Snyder
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Patent number: 9720865Abstract: A programmable device, having an analog component coupled with an analog bus and a digital component coupled with a digital bus together with a set of 10 pads, each of which capable of being coupled to a bus line of one segment of the analog bus as well as to at least one digital bus line, and where the analog bus is capable of being used to connect a pair of the pads to each other.Type: GrantFiled: November 13, 2014Date of Patent: August 1, 2017Assignee: Cypress Semiconductor CorporationInventors: Timothy J. Williams, David G. Wright, Harold Kutz, Eashwar Thiagarajan, Warren S. Snyder, Mark E Hastings