Abstract: An integrated circuit such as a programmable integrated circuit may include input-output circuits each having respective memory controller circuitry. The memory controller circuitry of the input-output circuits may be electrically coupled via a backbone path and configured to collectively form a memory controller. Each memory controller circuitry may include a protocol control circuit and input-output lanes. Memory access requests from on-chip circuitry may be provided to only a selected input-output circuit. The protocol control circuit of the selected input-output circuit may receive the memory access requests and generate memory control signals and local control signals from the memory access requests. The memory control signals may be provided to external memory. The local control signals may be provided to input-output circuits over the backbone path and synchronize the input-output circuits in conveying data between the integrated circuit and the external memory.

Abstract: A frequency divider circuit includes an adder circuit, multiplexer circuits, and a phase interpolator circuit. The adder circuit generates a summed value. The multiplexer circuits receive first periodic signals and generate second periodic signals by selecting among the first periodic signals based on the summed value. The phase interpolator circuit generates a third periodic signal using a weighted average of the second periodic signals that is determined based on the summed value.