Abstract: RFID tags include circuitry operable to receive an input signal from a common transceiver and generate at least first and second signals, a first signal adapted to transmit information to the common transceiver and a second signal adapted to transmit information to adjacent RFID tags. The second adapted signal is received by the adjacent RFID tags and used to control their operation wherein they are temporarily disabled. During the time that the adjacent RFID tags are disabled, the first RFID tag communicates with the common transceiver via the first signal. When communication is complete the first RFID tags temporarily disable themselves allowing the adjacent RFID tags to be enabled and communicate with the common transceiver. In this manner only limited numbers of RFID tags are transmitting at one time thereby limiting the amount of RF power impinging upon the common transceiver.

Abstract: A cathode with an improved work function, for use in a lithographic system, such as the SCALPEL™ system, which includes a buffer between a substrate and an emissive layer, where the buffer alters, randomizes, miniaturizes, and/or isolates the grain structure at a surface of the substrate to reduce the grain size, randomize crystal orientation and reduce the rate of crystal growth. The buffer layer may be a solid solution or a multiphase alloy. A method of making the cathode by depositing a buffer between a surface of the substrate and an emissive layer, where the deposited buffer alters, randomizes, miniaturizes, and/or isolates the grain structure at a surface of the substrate to reduce the grain size, randomize crystal orientation and reduce the rate of crystal growth.

Abstract: Techniques for processing power transistor devices are provided. In one aspect, the curvature of a power transistor device comprising a device film formed on a substrate is controlled by thinning the substrate, the device having an overall residual stress attributable at least in part to the thinning step, and applying a stress compensation layer to a surface of the device film, the stress compensation layer having a tensile stress sufficient to counterbalance at least a portion of the overall residual stress of the device. The resultant power transistor device may be part of an integrated circuit.