Patents by Inventor Waseem S. Kraipak

Waseem S. Kraipak has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8417986
    Abstract: According to some embodiments, a method and system are provided to initiate communication at an integrated circuit that is electrically coupled to a plurality of voltage regulators, determine a slowest one of the plurality of voltage regulators that is electrically coupled to the integrated circuit, and communicate with the plurality of voltage regulators that are electrically coupled to the integrated circuit at a speed associated with the slowest one of the plurality of voltage regulators.
    Type: Grant
    Filed: October 27, 2010
    Date of Patent: April 9, 2013
    Assignee: Intel Corporation
    Inventors: Waseem S. Kraipak, Jayesh Iyer, Edward R. Stanford
  • Patent number: 8412976
    Abstract: According to some embodiments, a method and system are provided to initiate communication at an integrated circuit that is electrically coupled to a plurality of voltage regulators, determine a slowest one of the plurality of voltage regulators that is electrically coupled to the processor, transmit address information to the plurality of voltage regulators that are electrically coupled to the processor at a first speed associated with the slowest one of the plurality of voltage regulators, determine a second speed associated with a voltage regulator to which the address information is associated, and transmit a second portion of the packet at the second speed associated with the voltage regulator to which the address information is associated.
    Type: Grant
    Filed: October 27, 2010
    Date of Patent: April 2, 2013
    Assignee: Intel Corporation
    Inventors: Waseem S. Kraipak, Jayesh Iyer, Edward R. Stanford
  • Publication number: 20110154075
    Abstract: According to some embodiments, a method and system are provided to initiate communication at an integrated circuit that is electrically coupled to a plurality of voltage regulators, determine a slowest one of the plurality of voltage regulators that is electrically coupled to the processor, transmit address information to the plurality of voltage regulators that are electrically coupled to the processor at a first speed associated with the slowest one of the plurality of voltage regulators, determine a second speed associated with a voltage regulator to which the address information is associated, and transmit a second portion of the packet at the second speed associated with the voltage regulator to which the address information is associated.
    Type: Application
    Filed: October 27, 2010
    Publication date: June 23, 2011
    Inventors: Waseem S. Kraipak, Jayesh Iyer, Edward R. Stanford