Abstract: An amount of electric power consumption by a battery is reduced, and deterioration of a coil is suppressed by efficiently heating an injector and melting urea crystals at an early stage. A control device for a reducing agent injection device fills the device with a reducing agent at a start-up of an internal combustion engine and executes control for injecting the reducing agent into an exhaust passage of the internal combustion engine by the injector. The control device includes an energization control section that executes energization control in which, after an exhaust temperature of the internal combustion engine becomes equal to or higher than a specified threshold value, a temperature of the injector is increased by energizing the coil of the injector for a specified time and melting of the crystals of the reducing agent precipitated in the injector is promoted.

Abstract: An amount of electric power consumption by a battery is reduced, and deterioration of a coil is suppressed by efficiently heating an injector and melting urea crystals at an early stage. A control device for a reducing agent injection device fills the device with a reducing agent at a start-up of an internal combustion engine and executes control for injecting the reducing agent into an exhaust passage of the internal combustion engine by the injector. The control device includes an energization control section that executes energization control in which, after an exhaust temperature of the internal combustion engine becomes equal to or higher than a specified threshold value, a temperature of the injector is increased by energizing the coil of the injector for a specified time and melting of the crystals of the reducing agent precipitated in the injector is promoted.

Abstract: There are provided a reductant supply device and a control method for the reductant supply device, which can prevent heat damage of a reductant injection valve, and also prevent crystallization of urea solution due to excessive cooling of the solution reductant.

Abstract: The object is to reduce the amount of processing in network simulation executed at the time of evaluating communication quality of a wireless LAN and reduce computation time of simulation based on a set radio wave propagation situation. At a step of executing network simulation in a wireless LAN communication quality evaluation method using network simulation, a situation of arrival of a radio wave transmitted by a terminal at other access point or other terminal is considered to be the same as a situation of arrival of a radio wave transmitted by an access point to which the terminal belongs at other access point or an access point to which other terminal belongs.

Abstract: In a station placement design of a scheme which assigns an address to each wireless station when a network is configured, the station placement design is enabled to ensure that addresses can be assigned. A wireless system designing method is a wireless system designing method for designing a wireless system having a mode in which an address is assigned to each wireless station when a network is formed, wherein a link quality is estimated between respective wireless stations which are installed within a predetermined region, and it is confirmed whether or not an address can be assigned to each wireless station in a topology which is formed only with links which are estimated to have link qualities equal to or higher than a predetermined level.

Abstract: A network synchronization method allows reduced frequency fluctuations due to synchronization control in a network. Each node connected to the network has time information individually varying in a period of T. A time master node periodically notifies its own time information to time slave devices. Each time slave node prepares update-possible time points having a period of T/N (N>1). When receiving master time information, each time slave node updates its own time information using the master time information at an update-possible time point just after the master time information has been received.

Abstract: A network synchronization method allows reduced frequency fluctuations due to synchronization control in a network. Each node connected to the network has time information individually varying in a period of T. A time master node periodically notifies its own time information to time slave devices. Each time slave node prepares update-possible time points having a period of T/N (N>1). When receiving master time information, each time slave node updates its own time information using the master time information at an update-possible time point just after the master time information has been received.

Abstract: The invention provides, for an IEEE 1394 network wherein a plurality of IEEE 1394 serial buses are connected to each other by means of a bridge, a synchronization method between the buses wherein an existing 1394 apparatus operates even if it is connected to one of the buses and a band resource of the bus is not consumed. As a network cycle master which functions as a reference clock source of an entire network, an arbitrary one portal is selected. In each bus to which the network cycle master is not connected, a portal which has the least node hop number to the network cycle master is selected as a local cycle master. The other portals which are not selected are all set as a dependent portal. The network cycle master and the dependent portals transmit a synchronizing signal to the other portals in the same bridge.

Abstract: In a speed converter for an IEEE-1394 serial bus network, first and second communication device nodes are attached to first and second buses. A first transceiver node receives an inbound first packet at a first speed from the first bus and transmits an inbound second packet, which is received from the second bus by a second transceiver node at a second speed, as an outbound second packet at the first speed to the first bus. The second transceiver node transmits the inbound first packet as an outbound first packet at a second speed to the second bus. Header translation circuitry translates the destination identifier of the inbound first packet to the destination identifier of the outbound first packet according to a mapped relationship between the first transceiver node and the second communication node, and translates the destination identifier of the inbound second packet to the destination identifier of the outbound second packet.

Abstract: An isochronous packet transfer method is provided which can reduce a transmit buffer size required for isochronous packet transfer, and which can give a constant delay to an isochronous packet even if transmission of a cycle start packet is delayed. An isochronous packet received from an input side bus is input to a delay section, and this isochronous packet is delayed in accordance with delay information and is transmitted to an output side bus. Input side and output side cycle identification information generating sections respectively output cycle identification information which changes at a timing at which a cycle start packet is sent to the input side bus and the output side bus. Input side and output side reference cycle identification information generating sections sample the input side and output side cycle identification information at predetermined timing and output input side and output side reference cycle identification information.

Abstract: In a radio communication system adapted to decide one channel out of a plurality of radio frequency channels, and to cause communication to be made between a radio base station and a child radio station, decision of the channel is made at a periodic timing in the radio base station to notify information relating to this decided channel to the child radio station. Also, a configuration is made so that whenever the channel is decided and switched, communication quality (interference state) of its channel is detected in an interference quantity determination section 140 to make the channel decision by making a reference to this communication quality as well. By doing so, less communication interruption time occurs, and an influence that is given to communication performance of a wireless LAN can be reduced.

Abstract: A network configuration method ensuring high reliability of bridge manager selection and bus reset is disclosed. After configuring each of the IEEE 1394 buses according to IEEE 1394 standard, a network management node is selected from a first IEEE 1394 bus including at least one node capable of network management. First, the first IEEE 1394 bus is configured such that the first IEEE 1394 bus belongs to the network management node. Then, an adjacent IEEE 1394 bus of the first IEEE 1394 bus is configured into a configured IEEE 1394 bus to produce an interim network such that the adjacent IEEE 1394 bus belongs to the network management node. The configuration of the adjacent IEEE 1394 bus is repeated until no adjacent IEEE 1394 bus which does not belong to the network management node is left in the IEEE 1394 network.

Abstract: A connection controller for a serial bus network includes physical layer processing circuitry for performing the protocol of the physical layer of the network to establish communications with first, second and third nodes. The first node is specified as an initiator node and the second node is a target node of the first node. The physical layer processing circuitry is energized by power supplied from the first node. To reliably establish connections between desired nodes in a first-to-win racing environment, a delay time is introduced in response to the physical layer processing circuitry being energized. During the delay time, a logical connection is established between the first and second nodes and the third node is set in a disabled state.

Abstract: A network synchronization method allows reduced frequency fluctuations due to synchronization control in a network. Each node connected to the network has time information individually varying in a period of T. A time master node periodically notifies its own time information to time slave devices. Each time slave node prepares update-possible time points having a period of T/N (N>1). When receiving master time information, each time slave node updates its own time information using the master time information at an update-possible time point just after the master time information has been received.

Abstract: In a digital signal multiplexing device of a digital signal multiplexing and demultiplexing system, two multiplexers (21) respectively multiplex first and second programs of first to N-th MPEG2 compression encoded digital video signals into first and second transport signal sequences in accordance with an MPEG2 transport signal scheme, where N represents an integer which is two or greater. In accordance with a time division multiplexing scheme other than the MPEG2 transport stream scheme, a single multiplexer (23) further multiplexes the first and the second sequences into a multiplexed digital signal comprising a succession of payloads in which the first to the N-th digital video signals are time division multiplexed. The system is useful in a wholly digital broadcast service for more than a score of satellite broadcast channels.

Abstract: A connection controller for a serial bus network includes physical layer processing circuitry for performing the protocol of the physical layer of the network to establish communications with first, second and third nodes. The first node is specified as an initiator node and the second node is a target node of the first node. The physical layer processing circuitry is energized by power supplied from the first node. To reliably establish connections between desired nodes in a first-to-win racing environment, a delay time is introduced in response to the physical layer processing circuitry being energized. During the delay time, a logical connection is established between the first and second nodes and the third node is set in a disabled state.

Abstract: Disclosed is an optical network which has a plurality of subordinate optical networks, each of which being connected with a plurality of optical terminals which function as a transmitter and a receiver of a signal light, wherein multiplexing of transmission signals and demultiplexing of reception signals at the optical terminals are carried out in the subcarrier multiplexing manner; and a main optical network which is connected with the subordinate optical networks, wherein multiplexing of signal lights transmitted from the subordinate optical networks is carried out in the wavelength division multiplexing manner.

Abstract: Disclosed is an optical network which has a plurality of subordinate optical networks, each of which being connected with a plurality of optical terminals which function as a transmitter and a receiver of a signal light, wherein multiplexing of transmission signals and demultiplexing of reception signals at the optical terminals are carried out in the subcarrier multiplexing manner; and a main optical network which is connected with the subordinate optical networks, wherein multiplexing of signal lights transmitted from the subordinate optical networks is carried out in the wavelength division multiplexing manner.

Abstract: An optical module for use in a subcarrier multiplexed (SCM) optical transmission system and capable of reducing the distortion of a signal light due to multiple reflections. A distortion reducing device is implemented by an optical fiber cable longer than the coherence length of the signal light and is located at each of signal input and output portions or each portion where optical devices are jointed together within the module.

Abstract: The present invention provides a resonance-type optical receiver circuit which keeps predetermined small distortion even when the received light level becomes high. The resonance-type optical receiver circuit varies the resistance value of variable resistance element 80, which is used as a load resistor to optical detector 4, in response to the intensity of output signal 10 of an amplifier. The load resistor varies in response to a variations of the received light level of the optical detector in this manner to keep the input to the amplifier lower than a fixed value.