Patents by Inventor Wataru IMAHASHI

Wataru IMAHASHI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220375657
    Abstract: A chip resistor includes a substrate, an upper electrode and a resistor body, a back electrode, a side electrode, and a metal plating layer. The substrate includes an upper surface, a back surface that intersect a thickness-wise direction and a side surface that joins the upper surface and the back surface. The upper electrode and the resistor body are formed on the upper surface. The back electrode is formed on the back surface. The side electrode is formed on the side surface. The metal plating layer includes a back plating layer and a side plating layer. The back plating layer covers at least a portion of the back electrode. The side plating layer covers at least a portion of the side electrode. The metal plating layer has a thickness that is greater than or equal to 10 ?m and less than or equal to 60 ?m.
    Type: Application
    Filed: October 29, 2020
    Publication date: November 24, 2022
    Inventors: Soichi SAKAKIBARA, Takanori SHINOURA, Wataru IMAHASHI
  • Patent number: 11189403
    Abstract: A chip resistor includes an upper electrode provided on a substrate, a resistor element connected to the upper electrode, and a side electrode connected to the upper electrode. The side electrode, arranged on a side surface of the substrate, has two portions overlapping with the obverse surface and reverse surface of the substrate, respectively. An intermediate electrode covers the side electrode, and an external electrode covers the intermediate electrode. A first protective layer is disposed between the upper electrode and the intermediate electrode, and held in contact with the upper electrode and the side electrode. The first protective layer is more resistant to sulfurization than the upper electrode. A second protective layer is disposed between the first protective layer and intermediate electrode, and held in contact with the first protective layer, side electrode and intermediate electrode.
    Type: Grant
    Filed: September 30, 2020
    Date of Patent: November 30, 2021
    Assignee: ROHM CO., LTD.
    Inventors: Takanori Shinoura, Wataru Imahashi
  • Publication number: 20210012932
    Abstract: A chip resistor includes an upper electrode provided on a substrate, a resistor element connected to the upper electrode, and a side electrode connected to the upper electrode. The side electrode, arranged on a side surface of the substrate, has two portions overlapping with the obverse surface and reverse surface of the substrate, respectively. An intermediate electrode covers the side electrode, and an external electrode covers the intermediate electrode. A first protective layer is disposed between the upper electrode and the intermediate electrode, and held in contact with the upper electrode and the side electrode. The first protective layer is more resistant to sulfurization than the upper electrode. A second protective layer is disposed between the first protective layer and intermediate electrode, and held in contact with the first protective layer, side electrode and intermediate electrode.
    Type: Application
    Filed: September 30, 2020
    Publication date: January 14, 2021
    Inventors: Takanori SHINOURA, Wataru IMAHASHI
  • Patent number: 10832837
    Abstract: A chip resistor includes an upper electrode provided on a substrate, a resistor element connected to the upper electrode, and a side electrode connected to the upper electrode. The side electrode, arranged on a side surface of the substrate, has two portions overlapping with the obverse surface and reverse surface of the substrate, respectively. An intermediate electrode covers the side electrode, and an external electrode covers the intermediate electrode. A first protective layer is disposed between the upper electrode and the intermediate electrode, and held in contact with the upper electrode and the side electrode. The first protective layer is more resistant to sulfurization than the upper electrode. A second protective layer is disposed between the first protective layer and intermediate electrode, and held in contact with the first protective layer, side electrode and intermediate electrode.
    Type: Grant
    Filed: September 13, 2019
    Date of Patent: November 10, 2020
    Assignee: ROHM CO., LTD.
    Inventors: Takanori Shinoura, Wataru Imahashi
  • Patent number: 10811174
    Abstract: One aspect of the present disclosure provides a chip resistor. In the chip resistor, a top electrode is disposed on a front surface of a substrate. A resistor is disposed on the front surface and electrically connected to the top electrode. A protective layer covers the resistor. A protective electrode is electrically connected to the top electrode. A side electrode is electrically connected to the top electrode. The side electrode has a side portion disposed on the side surface, and a top portion and a bottom portion respectively overlapping the front surface and the back surface in plan view. An intermediate electrode covers the protective electrode and the side electrode. An outer electrode covers the intermediate electrode. The protective electrode is in contact with both the top electrode and the protective layer and covers a portion of the top electrode and a portion of the protective layer.
    Type: Grant
    Filed: November 30, 2017
    Date of Patent: October 20, 2020
    Assignee: ROHM CO., LTD.
    Inventors: Wataru Imahashi, Takanori Shinoura
  • Publication number: 20200066429
    Abstract: One aspect of the present disclosure provides a chip resistor. In the chip resistor, a top electrode is disposed on a front surface of a substrate. A resistor is disposed on the front surface and electrically connected to the top electrode. A protective layer covers the resistor. A protective electrode is electrically connected to the top electrode. A side electrode is electrically connected to the top electrode. The side electrode has a side portion disposed on the side surface, and a top portion and a bottom portion respectively overlapping the front surface and the back surface in plan view. An intermediate electrode covers the protective electrode and the side electrode. An outer electrode covers the intermediate electrode. The protective electrode is in contact with both the top electrode and the protective layer and covers a portion of the top electrode and a portion of the protective layer.
    Type: Application
    Filed: November 30, 2017
    Publication date: February 27, 2020
    Inventors: Wataru IMAHASHI, Takanori SHINOURA
  • Publication number: 20200005972
    Abstract: A chip resistor includes an upper electrode provided on a substrate, a resistor element connected to the upper electrode, and a side electrode connected to the upper electrode. The side electrode, arranged on a side surface of the substrate, has two portions overlapping with the obverse surface and reverse surface of the substrate, respectively. An intermediate electrode covers the side electrode, and an external electrode covers the intermediate electrode. A first protective layer is disposed between the upper electrode and the intermediate electrode, and held in contact with the upper electrode and the side electrode. The first protective layer is more resistant to sulfurization than the upper electrode. A second protective layer is disposed between the first protective layer and intermediate electrode, and held in contact with the first protective layer, side electrode and intermediate electrode.
    Type: Application
    Filed: September 13, 2019
    Publication date: January 2, 2020
    Inventors: Takanori SHINOURA, Wataru IMAHASHI
  • Patent number: 10453593
    Abstract: A chip resistor includes an upper electrode provided on a substrate, a resistor element connected to the upper electrode, and a side electrode connected to the upper electrode. The side electrode, arranged on a side surface of the substrate, has two portions overlapping with the obverse surface and reverse surface of the substrate, respectively. An intermediate electrode covers the side electrode, and an external electrode covers the intermediate electrode. A first protective layer is disposed between the upper electrode and the intermediate electrode, and held in contact with the upper electrode and the side electrode. The first protective layer is more resistant to sulfurization than the upper electrode. A second protective layer is disposed between the first protective layer and intermediate electrode, and held in contact with the first protective layer, side electrode and intermediate electrode.
    Type: Grant
    Filed: May 11, 2018
    Date of Patent: October 22, 2019
    Assignee: ROHM CO., LTD.
    Inventors: Takanori Shinoura, Wataru Imahashi
  • Publication number: 20180261361
    Abstract: A chip resistor includes an upper electrode provided on a substrate, a resistor element connected to the upper electrode, and a side electrode connected to the upper electrode. The side electrode, arranged on a side surface of the substrate, has two portions overlapping with the obverse surface and reverse surface of the substrate, respectively. An intermediate electrode covers the side electrode, and an external electrode covers the intermediate electrode. A first protective layer is disposed between the upper electrode and the intermediate electrode, and held in contact with the upper electrode and the side electrode. The first protective layer is more resistant to sulfurization than the upper electrode. A second protective layer is disposed between the first protective layer and intermediate electrode, and held in contact with the first protective layer, side electrode and intermediate electrode.
    Type: Application
    Filed: May 11, 2018
    Publication date: September 13, 2018
    Inventors: Takanori SHINOURA, Wataru IMAHASHI
  • Patent number: 9997281
    Abstract: A chip resistor includes an upper electrode provided on a substrate, a resistor element connected to the upper electrode, and a side electrode connected to the upper electrode. The side electrode, arranged on a side surface of the substrate, has two portions overlapping with the obverse surface and reverse surface of the substrate, respectively. An intermediate electrode covers the side electrode, and an external electrode covers the intermediate electrode. A first protective layer is disposed between the upper electrode and the intermediate electrode, and held in contact with the upper electrode and the side electrode. The first protective layer is more resistant to sulfurization than the upper electrode. A second protective layer is disposed between the first protective layer and intermediate electrode, and held in contact with the first protective layer, side electrode and intermediate electrode.
    Type: Grant
    Filed: February 16, 2016
    Date of Patent: June 12, 2018
    Assignee: ROHM CO., LTD.
    Inventors: Takanori Shinoura, Wataru Imahashi
  • Publication number: 20160247610
    Abstract: A chip resistor includes an upper electrode provided on a substrate, a resistor element connected to the upper electrode, and a side electrode connected to the upper electrode. The side electrode, arranged on a side surface of the substrate, has two portions overlapping with the obverse surface and reverse surface of the substrate, respectively. An intermediate electrode covers the side electrode, and an external electrode covers the intermediate electrode. A first protective layer is disposed between the upper electrode and the intermediate electrode, and held in contact with the upper electrode and the side electrode. The first protective layer is more resistant to sulfurization than the upper electrode. A second protective layer is disposed between the first protective layer and intermediate electrode, and held in contact with the first protective layer, side electrode and intermediate electrode.
    Type: Application
    Filed: February 16, 2016
    Publication date: August 25, 2016
    Inventors: Takanori SHINOURA, Wataru IMAHASHI