Patents by Inventor Wataru Kamisaka

Wataru Kamisaka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20100230730
    Abstract: A solid-state imaging device includes: an imaging region including a plurality of light-receiving parts; a first transfer section provided on the imaging region and transferring, in a first direction, signals generated by the light-receiving parts; a second transfer section provided at a first side of the imaging region and transferring, in a second direction intersecting the first direction, the signals transferred from the first transfer section; an output circuit for outputting the signals; and bonding pads provided at the first side of the imaging region with the second transfer section sandwiched between the imaging region and the bonding pads. The bonding pads are arranged in a plurality of rows each extending in the second direction. Each of the bonding pads in one of the rows at least partially overlaps one of the bonding pads in another one of the rows when viewed in the first direction.
    Type: Application
    Filed: May 26, 2010
    Publication date: September 16, 2010
    Applicant: Panasonic Corporation
    Inventors: Ikuya SHIBATA, Wataru Kamisaka, Kozo Orihara
  • Patent number: 7759709
    Abstract: A solid-state imaging device includes: an imaging region including a plurality of light-receiving parts; a first transfer section provided on the imaging region and transferring, in a first direction, signals generated by the light-receiving parts; a second transfer section provided at a first side of the imaging region and transferring, in a second direction intersecting the first direction, the signals transferred from the first transfer section; an output circuit for outputting the signals; and bonding pads provided at the first side of the imaging region with the second transfer section sandwiched between the imaging region and the bonding pads. The bonding pads are arranged in a plurality of rows each extending in the second direction. Each of the bonding pads in one of the rows at least partially overlaps one of the bonding pads in another one of the rows when viewed in the first direction.
    Type: Grant
    Filed: September 4, 2008
    Date of Patent: July 20, 2010
    Assignee: Panasonic Corporation
    Inventors: Ikuya Shibata, Wataru Kamisaka, Kozo Orihara
  • Publication number: 20090189197
    Abstract: A solid-state imaging device includes: an imaging region including a plurality of light-receiving parts; a first transfer section provided on the imaging region and transferring, in a first direction, signals generated by the light-receiving parts; a second transfer section provided at a first side of the imaging region and transferring, in a second direction intersecting the first direction, the signals transferred from the first transfer section; an output circuit for outputting the signals; and bonding pads provided at the first side of the imaging region with the second transfer section sandwiched between the imaging region and the bonding pads. The bonding pads are arranged in a plurality of rows each extending in the second direction. Each of the bonding pads in one of the rows at least partially overlaps one of the bonding pads in another one of the rows when viewed in the first direction.
    Type: Application
    Filed: September 4, 2008
    Publication date: July 30, 2009
    Inventors: Ikuya Shibata, Wataru Kamisaka, Kozo Orihara
  • Patent number: 5432363
    Abstract: Photoelectric converting parts and vertical CCD register parts are formed in a semiconductor substrate. Polysilicon electrodes are formed on the vertical CCD register parts. On the polysilicon electrodes, polysilicon oxide film and dielectric film are deposited. On the polysilicon electrodes, contact windows are formed by mask matching and etching. The contact windows are formed in the first polysilicon electrode and second polysilicon electrode so as to realize four-phase drive of the solid-state image pickup device. Polysilicon film and tungsten silicide film are formed thereon. By etching these films, a first wiring is formed. A second wiring of aluminum film is formed thereon through an interlayer dielectric film. Hence, a high transfer efficiency and a favorable smear noise characteristic are presented at low illumination.
    Type: Grant
    Filed: November 23, 1994
    Date of Patent: July 11, 1995
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Wataru Kamisaka, Hiroyuki Okada, Yuji Matsuda
  • Patent number: 5424775
    Abstract: A p type well is formed on a silicon substrate. An n.sup.- type region forming a photo diode is formed in the p type well. A p type region is also formed in the p type well. The p type region is used for surrounding the n type region which becomes a vertical CCD register part. Generally, such a structure is called a Hi-C structure. A P.sup.+ type region for controlling the potential height when transferring is formed between the photo diode and the vertical CCD register part. A P.sup.+ type region is formed for electrical separation. A P.sup.++ type region is formed on the surface of a silicon substrate of the photo diode. On the silicon substrate, a gate oxide film is grown. A silicon nitride film is grown in a specified region on the gate oxide film. On the silicon nitride film, a polysilicon electrode which is a conductive electrode, acting as a driving electrode, is formed. On the surface of the polysilicon electrode, a polysilicon oxide film is grown by thermal oxidation.
    Type: Grant
    Filed: June 9, 1994
    Date of Patent: June 13, 1995
    Assignee: Matsushita Electronics Corporation
    Inventors: Wataru Kamisaka, Hiroyuki Okada, Yasuyuki Deguchi
  • Patent number: 5302545
    Abstract: A charge-coupled device comprises transfer gate electrodes separated from a substrate by a multilayer insulating film, and gate electrodes of MIS transistors separated from the substrate by a single layer insulating film. The multilayer insulating film comprising at least a lower silicon oxide layer of 10 nm to 200 nm thickness and an upper silicon nitride layer of 10 nm to 100 nm thickness. Since each of the gate insulating films of the MIS transistors is the same layer as the lower silicon oxide layer, there occurs no degradation in the transistor characteristics due to the surface states or the trapping states present within the silicon nitride layer.
    Type: Grant
    Filed: June 7, 1993
    Date of Patent: April 12, 1994
    Assignee: Matsushita Electronics Corporation
    Inventors: Hiroyuki Okada, Wataru Kamisaka, Masaji Asaumi, Yuji Matsuda
  • Patent number: 5241198
    Abstract: A charge-coupled device comprises transfer gate electrodes separated from a substrate by a multi-layer insulating film, and gate electrodes of MIS transistors separated from the substrate by a single layer insulating film. The multilayer insulating film comprising at least a lower silicon oxide layer of 10 nm to 200 nm thickness and an upper silicon nitride layer of 10 nm to 100 nm thickness. Since each of the gate insulating films of the MIS transistors is the same layer as the lower silicon oxide layer, there occurs no degradation in the transistor characteristics due to the surface states or the trapping states present within the silicon nitride layer.
    Type: Grant
    Filed: November 25, 1991
    Date of Patent: August 31, 1993
    Assignee: Matsushita Electronics Corporation
    Inventors: Hiroyuki Okada, Wataru Kamisaka, Masaji Asaumi, Yuji Matsuda