Patents by Inventor WATARU KANAGA

WATARU KANAGA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9425302
    Abstract: A semiconductor device includes a source electrode portion and a drain electrode formed on a semiconductor stacked body so as to be at an interval from each other, and a gate electrode formed between the source electrode portion and the drain electrode at an interval from the source electrode portion and the drain electrode. The source electrode portion includes a first recess electrode being directly in contact with a two-dimensional electron gas layer formed in the first nitride semiconductor layer, and a surface electrode formed between the gate electrode and the first recess electrode and connected conductively to the two-dimensional electron gas layer. A source potential is applied to the surface electrode and the recess electrode, and a width of the surface electrode in a gate-source direction is 0.4 times or more a distance between a gate-side end of the surface electrode and a source-side end of the gate electrode.
    Type: Grant
    Filed: January 20, 2016
    Date of Patent: August 23, 2016
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Wataru Kanaga, Hiroaki Kawano, Shingo Matsuda, Katsuhiko Kawashima
  • Publication number: 20160133739
    Abstract: A semiconductor device includes a source electrode portion and a drain electrode formed on a semiconductor stacked body so as to be at an interval from each other, and a gate electrode formed between the source electrode portion and the drain electrode at an interval from the source electrode portion and the drain electrode. The source electrode portion includes a first recess electrode being directly in contact with a two-dimensional electron gas layer formed in the first nitride semiconductor layer, and a surface electrode formed between the gate electrode and the first recess electrode and connected conductively to the two-dimensional electron gas layer. A source potential is applied to the surface electrode and the recess electrode, and a width of the surface electrode in a gate-source direction is 0.4 times or more a distance between a gate-side end of the surface electrode and a source-side end of the gate electrode.
    Type: Application
    Filed: January 20, 2016
    Publication date: May 12, 2016
    Inventors: WATARU KANAGA, HIROAKI KAWANO, SHINGO MATSUDA, KATSUHIKO KAWASHIMA