Patents by Inventor Wataru KANEDA

Wataru KANEDA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11430725
    Abstract: A wiring board includes a first wiring layer formed on one surface of a core layer, a first insulating layer formed on the one surface of the core layer so as to cover the first wiring layer, a via wiring embedded in the first insulating layer, a second wiring layer formed on a first surface of the first insulating layer, and a second insulating layer thinner than the first insulating layer formed on the first surface of the first insulating layer so as to cover the second wiring layer. The first wiring layer comprises a pad and a plane layer provided around the pad. One end surface of the via wiring is exposed from the first surface of the first insulating layer and directly bonded to the second wiring layer. The other end surface of the via wiring is directly bonded to the pad in the first insulating layer.
    Type: Grant
    Filed: March 15, 2021
    Date of Patent: August 30, 2022
    Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Noriyoshi Shimizu, Wataru Kaneda, Akio Rokugawa
  • Publication number: 20210202361
    Abstract: A wiring board includes a first wiring layer formed on one surface of a core layer, a first insulating layer formed on the one surface of the core layer so as to cover the first wiring layer, a via wiring embedded in the first insulating layer, a second wiring layer formed on a first surface of the first insulating layer, and a second insulating layer thinner than the first insulating layer formed on the first surface of the first insulating layer so as to cover the second wiring layer. The first wiring layer comprises a pad and a plane layer provided around the pad. One end surface of the via wiring is exposed from the first surface of the first insulating layer and directly bonded to the second wiring layer. The other end surface of the via wiring is directly bonded to the pad in the first insulating layer.
    Type: Application
    Filed: March 15, 2021
    Publication date: July 1, 2021
    Inventors: Noriyoshi Shimizu, Wataru Kaneda, Akio Rokugawa
  • Patent number: 10978383
    Abstract: A wiring board includes a first wiring layer formed on one surface of a core layer, a first insulating layer formed on the one surface of the core layer so as to cover the first wiring layer, a via wiring embedded in the first insulating layer, a second wiring layer formed on a first surface of the first insulating layer, and a second insulating layer thinner than the first insulating layer formed on the first surface of the first insulating layer so as to cover the second wiring layer. The first wiring layer comprises a pad and a plane layer provided around the pad. One end surface of the via wiring is exposed from the first surface of the first insulating layer and directly bonded to the second wiring layer. The other end surface of the via wiring is directly bonded to the pad in the first insulating layer.
    Type: Grant
    Filed: March 20, 2015
    Date of Patent: April 13, 2021
    Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Noriyoshi Shimizu, Wataru Kaneda, Akio Rokugawa
  • Patent number: 9780043
    Abstract: A wiring board includes: a first insulating layer which is made of an insulating resin containing a thermosetting resin as a main component; a recess portion formed in an upper surface of the first insulating a layer; a first wiring layer formed in the recess portion and comprising an upper surface exposed from the first insulating layer; a via wiring penetrating the first insulating layer in a thickness direction thereof and comprising an upper end surface exposed from the first insulating layer; a second wiring layer formed on the upper surface of the first insulating layer to contact the upper end surface of the via wiring and the upper surface of the first wiring layer; and a second insulating layer which is made of an insulating resin containing a photosensitive resin as a main component and which is formed on the upper surface of the first insulating layer.
    Type: Grant
    Filed: December 8, 2016
    Date of Patent: October 3, 2017
    Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Wataru Kaneda, Noriyoshi Shimizu
  • Publication number: 20170170130
    Abstract: A wiring board includes: a first insulating layer which is made of an insulating resin containing a thermosetting resin as a main component; a recess portion formed in an upper surface of the first insulating a layer; a first wiring layer formed in the recess portion and comprising an upper surface exposed from the first insulating layer; a via wiring penetrating the first insulating layer in a thickness direction thereof and comprising an upper end surface exposed from the first insulating layer; a second wiring layer formed on the upper surface of the first insulating layer to contact the upper end surface of the via wiring and the upper surface of the first wiring layer; and a second insulating layer which is made of an insulating resin containing a photosensitive resin as a main component and which is formed on the upper surface of the first insulating layer.
    Type: Application
    Filed: December 8, 2016
    Publication date: June 15, 2017
    Inventors: Wataru Kaneda, Noriyoshi Shimizu
  • Patent number: 9565775
    Abstract: A wiring board includes a first insulating layer coating a first wiring layer. A first through hole is opened in a surface of the first insulating layer and exposes a surface of the first wiring layer. A first via arranged in the first through hole includes an end surface exposed to the surface of the first insulating layer. A gap is formed between the first insulating layer and the first via in the first through hole. A second wiring layer is stacked on the surface of the first insulating layer and the end surface of the first via. The second wiring layer includes a pad filling the gap. The pad is greater in planar shape than the first through hole.
    Type: Grant
    Filed: August 27, 2014
    Date of Patent: February 7, 2017
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Noriyoshi Shimizu, Wataru Kaneda, Hiromu Arisaka, Akio Rokugawa
  • Patent number: 9455219
    Abstract: A wiring substrate includes, a base wiring substrate including a first wiring layer, a first insulating layer in which the first wiring layer is buried and a first via hole is formed under the first wiring layer, and a second wiring layer formed under the first insulating layer and connected to the first wiring layer through the first via hole, and a re-wiring portion including a second insulating layer formed on the base wiring substrate and having a second via hole formed on the first wiring layer, and a re-wiring layer formed on the second insulating layer and connected to the first wiring layer through the second via hole. The re-wiring layer is formed of a seed layer and a metal plating layer provided on the seed layer, and the seed layer is equal to or wider in width than the metal plating layer.
    Type: Grant
    Filed: December 27, 2013
    Date of Patent: September 27, 2016
    Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Noriyoshi Shimizu, Wataru Kaneda, Akio Rokugawa, Toshinori Koyama
  • Patent number: 9380707
    Abstract: A method of manufacturing a wiring substrate includes: preparing a laminated plate of a metal layer and an insulating layer; adhering the laminated plate to a first support body facing the metal layer; and forming a first wiring layer with vias extending through the insulating layer and first pads exposed from a first surface of the insulating layer. The method also includes: separating a multilayer structure including the metal, insulating, and first wiring layer from the first support body; adhering the multilayer structure to a second support body facing the first wiring layer; removing the metal layer; forming a plurality of second wiring layers including second pads connected to the vias and exposed from a second surface of the insulating layer opposite the first surface; and separating the insulating, the first wiring, and the plurality of second wiring layers from the second support body, to obtain the wiring substrate.
    Type: Grant
    Filed: November 26, 2013
    Date of Patent: June 28, 2016
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Noriyoshi Shimizu, Akio Rokugawa, Toshinori Koyama, Wataru Kaneda
  • Publication number: 20150282323
    Abstract: A wiring board includes a first wiring layer formed on one surface of a core layer, a first insulating layer formed on the one surface of the core layer so as to cover the first wiring layer, a via wiring embedded in the first insulating layer, a second wiring layer formed on a first surface of the first insulating layer, and a second insulating layer thinner than the first insulating layer formed on the first surface of the first insulating layer so as to cover the second wiring layer. The first wiring layer comprises a pad and a plane layer provided around the pad. One end surface of the via wiring is exposed from the first surface of the first insulating layer and directly bonded to the second wiring layer. The other end surface of the via wiring is directly bonded to the pad in the first insulating layer.
    Type: Application
    Filed: March 20, 2015
    Publication date: October 1, 2015
    Inventors: Noriyoshi Shimizu, Wataru Kaneda, Akio Rokugawa
  • Patent number: 9148952
    Abstract: A wiring board includes first insulating layers and second insulating layers formed on a core layer in this order; a third insulating layer and a solder resist layer formed on another surface of the core layer in this order, first wiring layers and second wiring layers formed in the first insulating layers and the second insulating layers, respectively, wherein a first end surface of the first via wiring exposes from the first surface of the outermost first insulating layer to be directly connected with an outermost second wiring layer, the first via wiring and the outermost second wiring layer being separately formed, the first surface of the outermost first insulating layer and the first end surface of the first via wiring are polished surfaces, smooth surfaces and are flush with each other, and the wiring density of the second wiring layers is higher than that of the first wiring layers.
    Type: Grant
    Filed: February 19, 2015
    Date of Patent: September 29, 2015
    Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Noriyoshi Shimizu, Hitoshi Sakaguchi, Wataru Kaneda, Masato Tanaka, Akio Rokugawa
  • Patent number: 9119319
    Abstract: A wiring board includes a first insulating layer containing a thermosetting resin, a first wiring layer stacked on an upper surface of the first insulating layer, a second insulating layer stacked on the upper surface of the first insulating layer, a second wiring layer stacked on an upper surface of the second insulating layer, and a third insulating layer stacked on the upper surface of the second insulating layer. The second and third insulating layers contain a first photosensitive resin. An outer side surface of the second insulating layer is flush with an outer side surface of the first insulating layer. An outer side surface of the third insulating layer is located inside the outer side surface of the second insulating layer in a plan view. The upper surface of the second insulating layer connecting to the outer side surface thereof is exposed from the third insulating layer.
    Type: Grant
    Filed: October 13, 2014
    Date of Patent: August 25, 2015
    Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Wataru Kaneda, Noriyoshi Shimizu, Akio Rokugawa, Kaori Yokota
  • Publication number: 20150163899
    Abstract: A wiring board includes first insulating layers and second insulating layers formed on a core layer in this order; a third insulating layer and a solder resist layer formed on another surface of the core layer in this order, first wiring layers and second wiring layers formed in the first insulating layers and the second insulating layers, respectively, wherein a first end surface of the first via wiring exposes from the first surface of the outermost first insulating layer to be directly connected with an outermost second wiring layer, the first via wiring and the outermost second wiring layer being separately formed, the first surface of the outermost first insulating layer and the first end surface of the first via wiring are polished surfaces, smooth surfaces and are flush with each other, and the wiring density of the second wiring layers is higher than that of the first wiring layers.
    Type: Application
    Filed: February 19, 2015
    Publication date: June 11, 2015
    Inventors: Noriyoshi SHIMIZU, Hitoshi SAKAGUCHI, Wataru KANEDA, Masato TANAKA, Akio ROKUGAWA
  • Publication number: 20150102510
    Abstract: A wiring board includes a first insulating layer containing a thermosetting resin, a first wiring layer stacked on an upper surface of the first insulating layer, a second insulating layer stacked on the upper surface of the first insulating layer, a second wiring layer stacked on an upper surface of the second insulating layer, and a third insulating layer stacked on the upper surface of the second insulating layer. The second and third insulating layers contain a first photosensitive resin. An outer side surface of the second insulating layer is flush with an outer side surface of the first insulating layer. An outer side surface of the third insulating layer is located inside the outer side surface of the second insulating layer in a plan view. The upper surface of the second insulating layer connecting to the outer side surface thereof is exposed from the third insulating layer.
    Type: Application
    Filed: October 13, 2014
    Publication date: April 16, 2015
    Inventors: Wataru Kaneda, Noriyoshi Shimizu, Akio Rokugawa, Kaori Yokota
  • Patent number: 9000302
    Abstract: A wiring board includes first insulating layers and second insulating layers formed on a core layer in this order; a third insulating layer and a solder resist layer formed on another surface of the core layer in this order, first wiring layers and second wiring layers formed in the first insulating layers and the second insulating layers, respectively, wherein a first end surface of the first via wiring exposes from the first surface of the outermost first insulating layer to be directly connected with an outermost second wiring layer, the first via wiring and the outermost second wiring layer being separately formed, the first surface of the outermost first insulating layer and the first end surface of the first via wiring are polished surfaces, smooth surfaces and are flush with each other, and the wiring density of the second wiring layers is higher than that of the first wiring layers.
    Type: Grant
    Filed: April 8, 2014
    Date of Patent: April 7, 2015
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Noriyoshi Shimizu, Hitoshi Sakaguchi, Wataru Kaneda, Masato Tanaka, Akio Rokugawa
  • Publication number: 20150062851
    Abstract: A wiring board includes a first insulating layer coating a first wiring layer. A first through hole is opened in a surface of the first insulating layer and exposes a surface of the first wiring layer. A first via arranged in the first through hole includes an end surface exposed to the surface of the first insulating layer. A gap is formed between the first insulating layer and the first via in the first through hole. A second wiring layer is stacked on the surface of the first insulating layer and the end surface of the first via. The second wiring layer includes a pad filling the gap. The pad is greater in planar shape than the first through hole.
    Type: Application
    Filed: August 27, 2014
    Publication date: March 5, 2015
    Inventors: Noriyoshi SHIMIZU, Wataru KANEDA, Hiromu ARISAKA, Akio ROKUGAWA
  • Publication number: 20140311771
    Abstract: A wiring board includes first insulating layers and second insulating layers formed on a core layer in this order; a third insulating layer and a solder resist layer formed on another surface of the core layer in this order, first wiring layers and second wiring layers formed in the first insulating layers and the second insulating layers, respectively, wherein a first end surface of the first via wiring exposes from the first surface of the outermost first insulating layer to be directly connected with an outermost second wiring layer, the first via wiring and the outermost second wiring layer being separately formed, the first surface of the outermost first insulating layer and the first end surface of the first via wiring are polished surfaces, smooth surfaces and are flush with each other, and the wiring density of the second wiring layers is higher than that of the first wiring layers.
    Type: Application
    Filed: April 8, 2014
    Publication date: October 23, 2014
    Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Noriyoshi SHIMIZU, Hitoshi SAKAGUCHI, Wataru KANEDA, Masato TANAKA, Akio ROKUGAWA
  • Publication number: 20140225275
    Abstract: A wiring substrate includes, a base wiring substrate including a first wiring layer, a first insulating layer in which the first wiring layer is buried and a first via hole is formed under the first wiring layer, and a second wiring layer formed under the first insulating layer and connected to the first wiring layer through the first via hole, and a re-wiring portion including a second insulating layer formed on the base wiring substrate and having a second via hole formed on the first wiring layer, and a re-wiring layer formed on the second insulating layer and connected to the first wiring layer through the second via hole. The re-wiring layer is formed of a seed layer and a metal plating layer provided on the seed layer, and the seed layer is equal to or wider in width than the metal plating layer.
    Type: Application
    Filed: December 27, 2013
    Publication date: August 14, 2014
    Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Noriyoshi SHIMIZU, Wataru KANEDA, Akio ROKUGAWA, Toshinori KOYAMA
  • Publication number: 20140150258
    Abstract: A wiring substrate includes a core portion and a wiring portion. The core portion includes a wiring layer and an organic resin core substrate. The wiring portion includes wiring layers and organic resin insulative layers. The wiring layer of the core portion is formed in a state in which the organic resin core substrate is supported by a support body. The wiring layers of the wiring portion are formed in a state in which the organic resin core substrate is adhered to a support body and the wiring layer of the core portion faces toward the support body.
    Type: Application
    Filed: November 26, 2013
    Publication date: June 5, 2014
    Inventors: Noriyoshi SHIMIZU, Akio ROKUGAWA, Toshinori KOYAMA, Wataru KANEDA