Abstract: Method and system are provided for handling data when power failure from a primary power source of a storage system is detected. The system provides a first memory and a second memory. The first memory is primarily used to store data when the primary power source is operating. If a power failure is detected, a first indicator is set to indicate that data is stored or being transferred to the second memory. Thereafter, data is transferred from the first memory to the second memory. Any errors during the transfer are logged. Once power is restored, data is transferred back to the first memory. A second indicator is set to indicate that there is no data at the second memory.

Abstract: A programmable DMA controller that uses an instruction set dedicated to moving data efficiently over a bus, comprising a program memory, a program counter, a FIFO memory, a bus buffer, registers, an accumulator, and an ALU. The DMA controller instruction set comprises the following instructions: load, move, add, subtract, branch on zero, branch on not zero, lock, and interrupt. Another DMA controller embodiment uses a SIMD processor. In operation, a CPU downloads DMA programs to the DMA controller. The DMA controller stores these programs in its program memory. The CPU signals the DMA to begin a DMA transfer operation. The ALU and associated devices execute the program instructions to perform the desired DMA transfer. The DMA controller then sends an interrupt to the CPU to indicate the DMA transfer is complete.