Patents by Inventor Wayne Anthony Sozansky

Wayne Anthony Sozansky has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11961670
    Abstract: A system may include a capacitor for an electronic device of an electric vehicle; a main bus bar; and a capacitor bus bar configured to connect the capacitor to the main bus bar, wherein the capacitor bus bar includes a first portion that is perpendicular to the main bus bar, and wherein the capacitor bus bar includes a second portion that extends from the first portion, that is perpendicular to the first portion, and that is planar with the main bus bar.
    Type: Grant
    Filed: October 6, 2022
    Date of Patent: April 16, 2024
    Assignee: Delphi Technologies IP Limited
    Inventors: Rajesh Mittu Ram Yadav, Teng Zhi Jau, Wayne Anthony Sozansky
  • Publication number: 20240120151
    Abstract: A system may include a capacitor for an electronic device of an electric vehicle; a main bus bar; and a capacitor bus bar configured to connect the capacitor to the main bus bar, wherein the capacitor bus bar includes a first portion that is perpendicular to the main bus bar, and wherein the capacitor bus bar includes a second portion that extends from the first portion, that is perpendicular to the first portion, and that is planar with the main bus bar.
    Type: Application
    Filed: October 6, 2022
    Publication date: April 11, 2024
    Applicant: Delphi Technologies IP Limited
    Inventors: Rajesh Mittu Ram YADAV, Teng Zhi JAU, Wayne Anthony SOZANSKY
  • Patent number: 6045032
    Abstract: A method of preventing solder reflow of a SMT component (14) attached with solder (22) to a circuit board (10) that subsequently undergoes a wave soldering operation. The method generally entails the use of a thermal shield (18, 28) that is either part of the support structure (12) for the circuit board (10) during the wave soldering operation, or a temporary mask (28) applied directly to a surface of the circuit board (10). In each case, the thermal shield (18, 28) is configured to contact and completely cover a limited surface region of the circuit board (10) directly opposite the SMT component (14). To provide adequate thermal protection, the covered surface region is preferably as large as or larger than the surface area of the component (14). In a preferred embodiment, the perimeter of the thermal shield (18, 28) has a tapered thickness, e.g., a beveled edge, that enables uninterrupted wave soldering of the surface surrounding the thermal shield (18, 28).
    Type: Grant
    Filed: July 31, 1998
    Date of Patent: April 4, 2000
    Assignee: Delco Electronics Corp.
    Inventors: Stuart E Longgood, Douglas E Gullion, Darrel E Peugh, Wayne Anthony Sozansky
  • Patent number: 5953814
    Abstract: A process and combination of materials for underfilling a surface-mount IC device (12), such as a flip chip, for the purpose of increasing the thermal cycle fatigue life of the terminals (14) that attach the device (12) to a thin-laminate organic circuit board (10), such as a printed wiring board (PWB) or printed circuit board (PCB). The process parameters and materials, including the underfill (20), masking (22) and cleaning materials used, exhibit a synergistic effect that increases thermal cycle fatigue resistance to a level at which a flip chip processed in accordance with this invention is capable of reliably withstanding at least 1000 one-hour cycles between -40.degree. C. and 150.degree. C. The materials and the manner in which the device (12) and circuit board (10) are prepared for application of the materials are critical to eliminating tendencies for inconsistent reliability in underfilled SM devices.
    Type: Grant
    Filed: February 27, 1998
    Date of Patent: September 21, 1999
    Assignee: Delco Electronics Corp.
    Inventors: Wayne Anthony Sozansky, Michael D. Gibson, Susan Acheson Mack, Michael Patrick Meehan, Darrel Eugene Peugh, James M. Rosson, Robin L. Sellers, Michael Ray Witty
  • Patent number: 5672528
    Abstract: A semiconductor device characterized by a field limiting ring formed by a number of field limiting cells that define wells which are laterally diffused to form a continuous equipotential ring between interior and exterior regions of a semiconductor device. A number of active cells are formed in the interior region, and are therefore delineated from the exterior region of the device. Each of these active cells is a transistor, and preferably a field-effect transistor, whose structure is essentially identical to the field limiting cells, except that their wells are not merged but instead are isolated from each other. The field limiting ring increases the breakdown voltage and the ruggedness of device, and therefore enables the device to sustain high voltages when the device is in the off-state. The process does not require masking, implanting and diffusion steps for the sole purpose of forming the field limiting ring, but is instead fully integrated with the semiconductor process for forming the active cells.
    Type: Grant
    Filed: April 22, 1996
    Date of Patent: September 30, 1997
    Assignee: Delco Electronics Corporation
    Inventors: Donald Ray Disney, Wayne Anthony Sozansky, James Max Himelick