Patents by Inventor Wayne Bryan Grabowski
Wayne Bryan Grabowski has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20140042533Abstract: In one embodiment, a transistor fabricated on a semiconductor die includes a first section of transistor segments disposed in a first area of the semiconductor die, and a second section of transistor segments disposed in a second area of the semiconductor die adjacent the first area. Each of the transistor segments in the first and second sections includes a pillar of a semiconductor material that extends in a vertical direction. First and second dielectric regions are disposed on opposite sides of the pillar. First and second field plates are respectively disposed in the first and second dielectric regions. Outer field plates of transistor segments adjoining first and second sections are either separated or partially merged.Type: ApplicationFiled: October 7, 2013Publication date: February 13, 2014Applicant: Power Integrations, Inc.Inventors: Vijay Parthasarathy, Wayne Bryan Grabowski
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Patent number: 8552493Abstract: In one embodiment, a transistor fabricated on a semiconductor die includes a first section of transistor segments disposed in a first area of the semiconductor die, and a second section of transistor segments disposed in a second area of the semiconductor die adjacent the first area. Each of the transistor segments in the first and second sections includes a pillar of a semiconductor material that extends in a vertical direction. First and second dielectric regions are disposed on opposite sides of the pillar. First and second field plates are respectively disposed in the first and second dielectric regions. Outer field plates of transistor segments adjoining first and second sections are either separated or partially merged.Type: GrantFiled: June 2, 2009Date of Patent: October 8, 2013Assignee: Power Integrations, Inc.Inventors: Vijay Parthasarathy, Wayne Bryan Grabowski
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Patent number: 7816731Abstract: In one embodiment, a transistor fabricated on a semiconductor die includes a first section of transistor segments disposed in a first area of the semiconductor die, and a second section of transistor segments disposed in a second area of the semiconductor die adjacent the first area. Each of the transistor segments in the first and second sections includes a pillar of a semiconductor material that extends in a vertical direction. First and second dielectric regions are disposed on opposite sides of the pillar. First and second field plates are respectively disposed in the first and second dielectric regions. Outer field plates of transistor segments adjoining first and second sections are either separated or partially merged. It is emphasized that this abstract is provided to comply with the rules requiring an abstract that will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure.Type: GrantFiled: January 20, 2009Date of Patent: October 19, 2010Assignee: Power Integrations, Inc.Inventors: Vijay Parthasarathy, Wayne Bryan Grabowski
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Publication number: 20090273023Abstract: In one embodiment, a transistor fabricated on a semiconductor die includes a first section of transistor segments disposed in a first area of the semiconductor die, and a second section of transistor segments disposed in a second area of the semiconductor die adjacent the first area. Each of the transistor segments in the first and second sections includes a pillar of a semiconductor material that extends in a vertical direction. First and second dielectric regions are disposed on opposite sides of the pillar. First and second field plates are respectively disposed in the first and second dielectric regions. Outer field plates of transistor segments adjoining first and second sections are either separated or partially merged.Type: ApplicationFiled: June 2, 2009Publication date: November 5, 2009Applicant: Power Integrations, Inc.Inventors: Vijay Parthasarathy, Wayne Bryan Grabowski
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Patent number: 7557406Abstract: In one embodiment, a transistor fabricated on a semiconductor die includes a first section of transistor segments disposed in a first area of the semiconductor die, and a second section of transistor segments disposed in a second area of the semiconductor die adjacent the first area. Each of the transistor segments in the first and second sections includes a pillar of a semiconductor material that extends in a vertical direction. First and second dielectric regions are disposed on opposite sides of the pillar. First and second field plates are respectively disposed in the first and second dielectric regions. Outer field plates of transistor segments adjoining first and second sections are either separated or partially merged.Type: GrantFiled: February 16, 2007Date of Patent: July 7, 2009Assignee: Power Integrations, Inc.Inventors: Vijay Parthasarathy, Wayne Bryan Grabowski
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Publication number: 20090134457Abstract: In one embodiment, a transistor fabricated on a semiconductor die includes a first section of transistor segments disposed in a first area of the semiconductor die, and a second section of transistor segments disposed in a second area of the semiconductor die adjacent the first area. Each of the transistor segments in the first and second sections includes a pillar of a semiconductor material that extends in a vertical direction. First and second dielectric regions are disposed on opposite sides of the pillar. First and second field plates are respectively disposed in the first and second dielectric regions. Outer field plates of transistor segments adjoining first and second sections are either separated or partially merged. It is emphasized that this abstract is provided to comply with the rules requiring an abstract that will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure.Type: ApplicationFiled: January 20, 2009Publication date: May 28, 2009Applicant: Power Integrations, Inc.Inventors: Vijay Parthasarathy, Wayne Bryan Grabowski
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Publication number: 20080197417Abstract: In one embodiment, a transistor fabricated on a semiconductor die includes a first section of transistor segments disposed in a first area of the semiconductor die, and a second section of transistor segments disposed in a second area of the semiconductor die adjacent the first area. Each of the transistor segments in the first and second sections includes a pillar of a semiconductor material that extends in a vertical direction. First and second dielectric regions are disposed on opposite sides of the pillar. First and second field plates are respectively disposed in the first and second dielectric regions. Outer field plates of transistor segments adjoining first and second sections are either separated or partially merged. It is emphasized that this abstract is provided to comply with the rules requiring an abstract that will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure.Type: ApplicationFiled: February 16, 2007Publication date: August 21, 2008Applicant: Power Integrations, Inc.Inventors: Vijay Parthasarathy, Wayne Bryan Grabowski
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Patent number: 7115958Abstract: A lateral power metal-oxide-semiconductor field effect transistor (MOSFET) having a gate structure in which the insulated gate is coupled to the gate electrode through contacts at a plurality of locations. The source electrode includes first and second segments. The first segment is interposed between the drain electrode and the gate electrode and acts as a field plate.Type: GrantFiled: October 19, 2004Date of Patent: October 3, 2006Assignee: Power Integrations, Inc.Inventors: Donald Ray Disney, Wayne Bryan Grabowski
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Patent number: 6825536Abstract: A lateral power metal-oxide-semiconductor field effect transistor (MOSFET) having a gate structure in which the insulated gate is coupled to the gate electrode through contacts at a plurality of locations. The source electrode includes first and second segments. The first segment is interposed between the drain electrode and the gate electrode and acts as a field plate.Type: GrantFiled: January 10, 2003Date of Patent: November 30, 2004Assignee: Power Integrations, Inc.Inventors: Donald Ray Disney, Wayne Bryan Grabowski
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Publication number: 20030137016Abstract: A lateral power metal-oxide-semiconductor field effect transistor (MOSFET) having a gate structure in which the insulated gate is coupled to the gate electrode through contacts at a plurality of locations. The source electrode includes first and second segments. The first segment is interposed between the drain electrode and the gate electrode and acts as a field plate.Type: ApplicationFiled: January 10, 2003Publication date: July 24, 2003Applicant: Power Integrations, Inc.Inventors: Donald Ray Disney, Wayne Bryan Grabowski
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Publication number: 20030080388Abstract: A lateral power metal-oxide-semiconductor field effect transistor (MOSFET) having a gate structure in which the insulated gate is coupled to the gate electrode through contacts at a plurality of locations. The source electrode includes first and second segments. The first segment is interposed between the drain electrode and the gate electrode and acts as a field plate.Type: ApplicationFiled: October 29, 2001Publication date: May 1, 2003Applicant: Power Integrations, Inc.Inventors: Donald Ray Disney, Wayne Bryan Grabowski
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Patent number: 6555883Abstract: A lateral power metal-oxide-semiconductor field effect transistor (MOSFET) having a gate structure in which the insulated gate is coupled to the gate electrode through contacts at a plurality of locations. The source electrode includes first and second segments. The first segment is interposed between the drain electrode and the gate electrode and acts as a field plate.Type: GrantFiled: October 29, 2001Date of Patent: April 29, 2003Assignee: Power Integrations, Inc.Inventors: Donald Ray Disney, Wayne Bryan Grabowski