Patents by Inventor Wayne E. Bradburn

Wayne E. Bradburn has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6678426
    Abstract: Lower resolution source data is synthesized to a higher resolution format for subsequent rendering on a lower resolution output device. Synthesis occurs by selecting or generating and using a synthesis template that represents a configuration of a plurality of pixel data in the higher resolution format into which the lower resolution source data is to be synthesized. A working or active pixel is identified from the lower resolution source data, a synthesis template is selected, and then the synthesis template pixel data is substituted for the working pixel for rendering on the output device. The synthesized higher resolution data is rendered in a manner such that dots represented by the synthesized data are formed interstitially relative to scan lines of the given lower raster/resolution capability of the output device. The working pixel is identified in the lower resolution data by recognizing a configuration of a plurality of pixel data adjacent the working pixel.
    Type: Grant
    Filed: March 24, 1998
    Date of Patent: January 13, 2004
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: James G. Bearss, Eugene A. Roylance, Wayne E. Bradburn, Arlin R. Jones
  • Patent number: 6390579
    Abstract: A pulse width modulator includes a clock operative to count successive discrete time intervals having a period equal to a desired full pulse width, and configured to generate a clock signal. The pulse width modulator also includes an adjustable delay line comprising a plurality of delay line elements, each delay line element operative to generate a clock signal at a specific location, which when combined with a transitional instruction, will produce a modulated output that has a plurality of transitions within the clock period. The pulse width modulator further includes processing circuitry configured to receive the clock signal and a pulse code input and operative to select one of the delay line elements to generate a clock signal at a specific location to produce a single modulated output that transitions at a desired modulated frequency. A method is also provided.
    Type: Grant
    Filed: April 15, 1999
    Date of Patent: May 21, 2002
    Assignee: Hewlett-Packard Company
    Inventors: Eugene A. Roylance, Wayne E. Bradburn