Abstract: Phase errors and gain errors are reduced in a receiver to increase the dynamic range of the receiver. An input signal is shifted to an intermediate frequency (IF) and divided into a first channel and a second channel. The first and second channels are multiplied by a complex intermediate frequency signal having a frequency equal to the negative of the IF and by the complex conjugate of the intermediate frequency signal to produce a complex normal signal and a complex conjugate signal. A gain correction factor and a phase correction factor are adjusted based on a correlation signal produced by multiplying the complex normal signal by the complex correlation signal.

Abstract: An ASIC chip interfaces with multiple data protocol specifications and includes a demodulator for data messages in a protocol at a first data rate, such as the TACTS protocol, and includes a demodulator for data messages in a protocol at a second data rate, such as the NACTS protocol. The ASIC chip is installed in a system for the transmission and receipt of data messages in the two protocols, and operates under control of a microprocessor, which selects between the available message protocols. Additional data rates and protocols beyond the first two can be accommodated. The different demodulators share processing structures that reduce the circuit components otherwise necessary for operation. This reduces the weight and power requirements of the chip. In this way, the ASIC chip provides a processing system that can operate with multiple data protocol specifications and data rates, while ensuring accurate and reliable detection of data streams in an aircraft operational environment.