Patents by Inventor Wayne Hsu

Wayne Hsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10324777
    Abstract: An example device may include processing circuitry and a management controller. The processing circuitry may include a communications interface that includes a first register and a second register. The first register may include a freshness bit and a number of first data bits. The second register may include a number of second data bits that correspond, respectively, to the first data bits. The processing circuitry may write variously to the first data bits in response to detected events, set the freshness bit in response to the management controller reading the first data bits, and reset the freshness bit if any of the first data bits are written to. The management controller may read the first data bits, perform predetermined processing based thereon, write to the second data bits based on the predetermined processing, and request a register transfer.
    Type: Grant
    Filed: October 27, 2016
    Date of Patent: June 18, 2019
    Assignee: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
    Inventors: Christoph L. Schmitz, Thomas Donald Rhodes, Nicholas Mark Hawkins, Binh Nguyen, Wayne Hsu
  • Publication number: 20180121087
    Abstract: An example device may include processing circuitry and a management controller. The processing circuitry may include a communications interface that includes a first register and a second register. The first register may include a freshness bit and a number of first data bits. The second register may include a number of second data bits that correspond, respectively, to the first data bits. The processing circuitry may write variously to the first data bits in response to detected events, set the freshness bit in response to the management controller reading the first data bits, and reset the freshness bit if any of the first data bits are written to. The management controller may read the first data bits, perform predetermined processing based thereon, write to the second data bits based on the predetermined processing, and request a register transfer.
    Type: Application
    Filed: October 27, 2016
    Publication date: May 3, 2018
    Inventors: Christoph L. Schmitz, Tom Rhodes, Nicholas Mark Hawkins, Binh Nguyen, Wayne Hsu