Abstract: Circuits, methods, and apparatus that provide isolation between receive and transmit circuits in a wireless transceiver. One example provides switches that can be included on an integrated circuit with at least portions of a wireless transceiver. These switches vary the impedance of transmitter and receiver circuits between a termination impedance and a high impedance by inserting or removing components in parallel with matching networks. Signal losses are minimized since these switches are shunt connected to input and output paths on the wireless circuit and are not connected directly in either signal path.

Abstract: Structures, architectures, systems, an integrated circuit, methods and software for configuring an integrated circuit for multiple packaging types and/or selecting one of a plurality of packaging types for an integrated circuit. The structure generally comprises a bump pad having a plurality of electrically disconnected bump pad sections, a plurality of bond pads each configured for electrical connection to one of the bump pad sections, and a plurality of conductive traces, each adapted to electrically connect one of the bond pads to the one bump pad section. The software is generally configured to place and route components of such a structure. The method of configuring generally includes the steps of forming the bump pad, the bond pads, and the conductive traces from an uppermost metal layer, and forming an insulation layer thereover.

Abstract: An amplifier biasing circuit that reduces gain variation in short channel amplifiers, an amplifier biasing circuit that produces a constant Gm biasing signal for short channel amplifiers, and a multistage amplifier that advantageously incorporates embodiment of both types of amplifier biasing circuits are described. Both amplifier biasing circuit approaches use an operational amplifier to equalize internal bias circuit voltages. The constant Gm biasing circuit produces a Gm of 1/R, where R is the value of a trim resistor value. The biasing circuit that reduces gain variation produces a Gm of approximately 1/R, where R is the value of a trim resistor value, however, the biasing circuit is configurable to adjust the bias circuit Gm to mitigate the impact of a wide range of circuit specific characteristics and a wide range of changes in the operational environment in which the circuit can used, such as changes in temperature.

Abstract: A system includes a power amplifier, a preamplifier, a first temperature sensor, and a bias generator. The power amplifier has a first gain, which is a function of a temperature of the power amplifier. The preamplifier has a second gain, amplifies an input signal, and outputs an amplified signal to the power amplifier. The first temperature sensor senses the temperature and generates a first signal. The bias generator generates a first biasing signal to bias the power amplifier, generates a second biasing signal to bias the preamplifier, and adjusts the second gain by adjusting the second biasing signal based on the first signal. The adjusted second gain compensates a change in the first gain due to the change in the temperature.

Abstract: Systems, devices and techniques relating to power amplifier protection include, in some implementations, a circuit including: attenuation circuitry to couple with an output of detection circuitry that provides a protection signal and to couple with an input of power amplifier circuitry; turn off circuitry to couple with the power amplifier circuitry, the turn off circuitry configured to turn off the power amplifier circuitry responsive to the protection signal; and the attenuation circuitry configured to reduce a gain of the power amplifier circuitry responsive to the protection signal, the attenuation circuitry comprising a delay stage configured to continue attenuating an RF input signal of the power amplifier circuitry until after the power amplifier circuitry turns on.

Abstract: An amplifier biasing circuit that reduces gain variation in short channel amplifiers, an amplifier biasing circuit that produces a constant Gm biasing signal for short channel amplifiers, and a multistage amplifier that advantageously incorporates embodiment of both types of amplifier biasing circuits are described. Both amplifier biasing circuit approaches use an operational amplifier to equalize internal bias circuit voltages. The constant Gm biasing circuit produces a Gm of 1/R, where R is the value of a trim resistor value. The biasing circuit that reduces gain variation produces a Gm of approximately 1/R, where R is the value of a trim resistor value, however, the biasing circuit is configurable to adjust the bias circuit Gm to mitigate the impact of a wide range of circuit specific characteristics and a wide range of changes in the operational environment in which the circuit can used, such as changes in temperature.

Abstract: Disclosed is a transmit/receive circuit arrangement wherein a transceiver circuit including a transmit/receive switch is fabricated on an integrated circuit chip. A matching network is wholly disposed off-chip relative to the integrated circuit chip. In embodiments, at least a portion of the matching network is formed off-chip and a portion of the matching network is formed on-chip.

Abstract: In one embodiment, an apparatus includes an inductor and an electrically conductive structure surrounding the inductor. The electrically conductive structure conducts a current when a first magnetic field passes through the electrically conductive structure. The current creates a second magnetic field opposing the first magnetic field.

Abstract: An adjustable, segmented amplifier including (i) a first fixed stage configured to amplify an analog signal in accordance with a fixed amplification, and provide the analog signal amplified in accordance with the fixed amplification to a first common node. The adjustable, segmented amplifier further includes an adjustable stage comprising a plurality of independently selectable parallel amplifier segments, wherein the adjustable stage is configured to (i) amplify the analog signal provided to the first common node in accordance with an adjustable amplification that is adjustable depending upon a number of the independently selectable parallel amplifier segments having been selected to amplify the analog signal provided to the first common node, and (ii) provide the analog signal amplified in accordance with the fixed amplification and amplified in accordance with the adjustable amplification to the second common node.

Abstract: An amplifier biasing circuit that reduces gain variation in short channel amplifiers, an amplifier biasing circuit that produces a constant Gm biasing signal for short channel amplifiers, and a multistage amplifier that advantageously incorporates embodiment of both types of amplifier biasing circuits are described. Both amplifier biasing circuit approaches use an operational amplifier to equalize internal bias circuit voltages. The constant Gm biasing circuit produces a Gm of 1/R, where R is the value of a trim resistor value. The biasing circuit that reduces gain variation produces a Gm of approximately 1/R, where R is the value of a trim resistor value, however, the biasing circuit is configurable to adjust the bias circuit Gm to mitigate the impact of a wide range of circuit specific characteristics and a wide range of changes in the operational environment in which the circuit can used, such as changes in temperature.

Abstract: In one embodiment, an apparatus includes a first reference voltage coupled to a first metal layer and a second reference voltage coupled to a second metal layer. A first finger type in the plurality of fingers is coupled to the first metal layer at a first area and coupled to the first metal layer and the second metal layer at a second area. A second finger type in the plurality of fingers is coupled to the second metal layer at the first area and coupled to the first metal layer and the second metal layer at the second area. Also, the first finger type and the second finger type alternately positioned next to each other.

Abstract: An adjustable stage in an amplifier. The adjustable stage generally comprises a first common node, a second common node and a plurality of independently selectable parallel amplifier segments. Each of the parallel segments may have an input at the first common node and an output at the second common node, a transistor and an inductor to resonate with a capacitance at a base of the transistor. The present invention advantageously provides a relatively compact power amplifier with an extended output power range at which the amplifier is highly efficient. In preferred embodiments, the input and output matching characteristics are generally independent of the number of selected output amplifier segments.

Abstract: A circuit includes: an input of shunt circuitry to couple with an output of detection circuitry that provides a protection signal; an output of the shunt circuitry to couple with an input of power amplification circuitry; and the shunt circuitry configured to reduce a gain of the power amplification circuitry responsive to the protection signal, the shunt circuitry including a delay stage configured to continue shunting of an input signal of the power amplification circuitry for a time period corresponding to a turn on time of the power amplification circuitry. In addition, a method includes: receiving a protection signal from detection circuitry; responsive to the protection signal, shunting an input signal of power amplification circuitry to reduce a gain of the power amplification circuitry; and continuing the shunting for a time period corresponding to a turn on time of the power amplification circuitry.

Abstract: Apparatus, systems, and methods implementing techniques for calibrating a filter circuit. A comparator generates an output based on a filter output amplitude signal and a reference amplitude signal. A calibration logic unit receives the comparator output and produces a component code that is used by the filter circuit to adjust one or more component values.

Abstract: Circuits, methods, and apparatus that provide isolation between receive and transmit circuits in a wireless transceiver. One example provides switches that can be included on an integrated circuit with at least portions of a wireless transceiver. These switches vary the impedance of transmitter and receiver circuits between a termination impedance and a high impedance by inserting or removing components in parallel with matching networks. Signal losses are minimized since these switches are shunt connected to input and output paths on the wireless circuit and are not connected directly in either signal path.

Abstract: A power amplifier protection circuit that includes protection circuitry to variably shunt an input radio frequency (RF) signal to AC ground, turn off bias to an output transistor of a power amplifier, and turn off the output transistor. The power amplifier protection circuit features an asymmetrical control that can quickly shut off a power amplifier, and turn on the power amplifier at a steady, controlled rate when an output transistor exceeds a predetermined threshold voltage.

Abstract: An architecture, circuits, systems and a method for amplifying an analog signal. The architecture and/or circuit generally includes a first fixed stage (e.g., a predriver) and an adjustable stage. The first fixed stage may be configured to amplify an analog signal and provide a first amplified analog output at a first common node. The adjustable stage may comprise a plurality of independently selectable parallel amplifier segments. Each of the parallel segments may have an input at the first common node and an output at a second common node, a transistor having a control terminal, and a first inductor in electrical communication with the control terminal of the transistor. The adjustable stage may be configured to apply a bias to the control terminal of the transistor in a selected segment and to provide an output signal in one of a plurality of a power ranges corresponding to a number of selected parallel amplifier segments.

Abstract: A power amplifier protection circuit that includes protection circuitry to variably shunt an input radio frequency (RF) signal to AC ground, turn off bias to an output transistor of a power amplifier, and turn off the output transistor. The power amplifier protection circuit features an asymmetrical control that can quickly shut off a power amplifier, and turn on the power amplifier at a steady, controlled rate when an output transistor exceeds a predetermined threshold voltage.

Abstract: An acoustic transducer comprising a substrate; and a diaphragm formed by depositing a micromachined membrane onto the substrate. The diaphragm is formed as a single silicon chip using a CMOS MEMS (microelectromechanical systems) semiconductor fabrication process. The curling of the diaphragm during fabrication is reduced by depositing the micromachined membrane for the diaphragm in a serpentine-spring configuration with alternating longer and shorter arms. As a microspeaker, the acoustic transducer of the present invention converts a digital audio input signal directly into a sound wave, resulting in a very high quality sound reproduction at a lower cost of production in comparison to conventional acoustic transducers. The micromachined diaphragm may also be used in microphone applications.

Abstract: An amplifier with adjustable (pre)distortion, a predistortion adjustment circuit, systems and networks including such amplifiers and circuits, and methods for adjusting (pre)distortion in an analog amplifier. The amplifier architecture generally includes (a) a predistortion circuit configured to (i) select a value for a predistortion function from a plurality of different predistortion values, and (ii) apply the selected predistortion value to an input signal to generate a predistorted input signal; (b) an amplifier configured to amplify the predistorted input signal and provide an output signal therefrom; and (c) an adjustment circuit configured to adjust selection of the predistortion function value in response to a predetermined parameter value of the amplifier. By adjusting the predistortion function, the amplifier provides an output signal in a linear power range over a range of amplifier parameter values and avoids overcompensation that can occur when the predistortion signal is not adjustable.