Patents by Inventor Wayne M. Needham

Wayne M. Needham has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6617868
    Abstract: A method and apparatus for testing integrated circuits is described. The method and apparatus provide a nearly constant power supply current load on the test power supply, and a nearly constant thermal load on the cooling system. This promotes more reliable and repeatable testing of production integrated circuits. A dummy load, in thermal contact with a device under test and the cooling system, consumes a value of current complementary to the current consumed by the device under test, which is under the control of a series of enhanced test vectors.
    Type: Grant
    Filed: May 15, 2000
    Date of Patent: September 9, 2003
    Assignee: Intel Corporation
    Inventor: Wayne M. Needham
  • Patent number: 6408410
    Abstract: A self-testing buffer circuit. In one embodiment, the buffer circuit of the present invention provides built in self-testing of input/output circuits on high speed devices without the need for expensive high end testers by switchably coupling the early input stage of a buffer circuit to the late output stage of the buffer circuit to create an oscillating feedback loop during self-test. A counter is used to count the total number of oscillations for a period of time to determine the oscillation rate of the input/output buffer circuit during the self-test. At the end of the count sequence, the count value is scanned out of the counter and it is determined whether the count value is within an expected range. If the count value is not within an expected range, then there is an increased probability of a speed related defect in the buffer circuit.
    Type: Grant
    Filed: June 13, 1997
    Date of Patent: June 18, 2002
    Assignee: Intel Corporation
    Inventor: Wayne M. Needham
  • Patent number: 5990699
    Abstract: A method for detecting open circuits in a semiconductor device, more specifically in a static CMOS device. A device to be tested is powered-up and the clock on the device is stopped so that the device enters a quiescent state. Once the device has reached a quiescent state a first current is measured and after a specified period of time a second current is also measured. The first current and the second current are then compared to determine if there is a defect, i.e. an open circuit, in the device. The determination as to whether or not a device is defective is based upon the difference between the first and second current measurements.
    Type: Grant
    Filed: January 16, 1996
    Date of Patent: November 23, 1999
    Assignee: Intel Corporation
    Inventors: Anthony C. Miller, Wayne M. Needham