Abstract: Network elements within a network are configured to retain clock traceability over an asynchronous interface. The network elements can generate and process multi-frames that include two different types of traffic, each synchronized to a different respective clock source. Each of the multi-frames is synchronized to the clock source of one of the traffic types and further includes a timestamp to enable the original clock signal of the other traffic type to be reconstructed at the receiving network element.

Abstract: Network elements within a network are configured to transport Ethernet traffic and non-Ethernet traffic over a same medium. The network elements can generate and process multi-frames that include the Ethernet traffic and non-Ethernet traffic. Each of the plurality of group slots includes a first set of bytes allocated to carry the non-Ethernet traffic and a second set of bytes allocated to carry the Ethernet traffic. At least one group slot of the plurality of group slots includes a timestamp, and the network elements are further configured to use the timestamp to reconstruct the original spacing between packets of the Ethernet traffic.

Abstract: We disclose an interface device configured to inter-convert CPRI data frames and Optical Transport Units (OTUs). The interface device acquires frame synchronization by temporarily storing data in a buffer bank such that translated sync characters are placed at respective predetermined locations within the buffer bank. Each translated sync character represents, in the corresponding OTU, a respective sync character of a CPRI hyperframe. The interface device is configured to distinguish translated sync characters from payload-data words of identical value based on predetermined alignment, in the buffer bank, of data temporarily stored therein for conversion into the CPRI data format. The interface device advantageously enables multiplexing of a plurality of CPRI links and aggregation and encapsulation of the multiplexed CPRI data into a stream of OTUs for transmission to the intended destination over an Optical Transport Network.

Abstract: Network elements within a network are configured to retain clock traceability over an asynchronous interface. The network elements can generate and process multi-frames that include two different types of traffic, each synchronized to a different respective clock source. Each of the multi-frames is synchronized to the clock source of one of the traffic types and further includes a timestamp to enable the original clock signal of the other traffic type to be reconstructed at the receiving network element.

Abstract: Network elements within a network are configured to transport Ethernet traffic and non-Ethernet traffic over a same medium. The network elements can generate and process multi-frames that include the Ethernet traffic and non-Ethernet traffic. Each of the plurality of group slots includes a first set of bytes allocated to carry the non-Ethernet traffic and a second set of bytes allocated to carry the Ethernet traffic. At least one group slot of the plurality of group slots includes a timestamp, and the network elements are further configured to use the timestamp to reconstruct the original spacing between packets of the Ethernet traffic.

Abstract: We disclose an interface device configured to inter-convert CPRI data frames and Optical Transport Units (OTUs). The interface device acquires frame synchronization by temporarily storing data in a buffer bank such that translated sync characters are placed at respective predetermined locations within the buffer bank. Each translated sync character represents, in the corresponding OTU, a respective sync character of a CPRI hyperframe. The interface device is configured to distinguish translated sync characters from payload-data words of identical value based on predetermined alignment, in the buffer bank, of data temporarily stored therein for conversion into the CPRI data format. The interface device advantageously enables multiplexing of a plurality of CPRI links and aggregation and encapsulation of the multiplexed CPRI data into a stream of OTUs for transmission to the intended destination over an Optical Transport Network.

Abstract: An arbitration circuit that uses a unique history register that is combined with a value representing bus requests to index into a table. All possible combinations of history register requests are stored in the table along with a corresponding grant. A block of the table is selected by the history register, and then the request is used to index into the block to determine which request receives a grant. The grant is then shifted into the history register. Advantageously, more than one table may be stored in memory which can be selected by an arbiter controller.

Abstract: An electronic circuit board electrically connected to other circuits of a data processing system by means of a bus, may be removed and re-inserted in the system without the necessity of disabling other circuits connected to the bus. A latch actuated switch provides a control signal in anticipation of circuit board removal. The control signal activates a finite state machine which seizes control of the bus after completion of any current bus communications and stops the generation of clock pulses normally required in bus communications. When contact is physically broken between the board and its corresponding connector, the finite state machine restores the bus clock pulses and relinquishes control of the bus. When a board is to be inserted in an open connector, contact between the board and the connector is sensed by the finite state machine which causes the bus to be seized and the bus clock pulses to be temporarily inhibited.