Abstract: A differential clock signal gating method and system is provided, providing a clock gating signal with a timing relationship to a clock signal and a differential pair current to a buffer differential pair load element. Switching the differential pair current from the load element to a buffer differential pair responsive to a gating signal pulse, the gating signal pulse correlated to a first clock signal pulse, the buffer differential pair buffers a second clock signal pulse occurring immediately and sequentially after the first clock signal pulse and successive clock signal pulses as a buffer clock signal output, the output comprising a plurality of pulses each having the clock signal amplitude and the clock signal pulse width.

Abstract: A differential clock signal gating method and system is provided, wherein a clock buffer circuit control path develops a clock gating signal with a timing relationship to a clock signal. The clock gating signal gates a buffer on the clock buffer circuit controlled path in communication with the clock signal responsive to a first clock signal pulse negative half. The buffer provides second and successive clock signal pulses occurring immediately and sequentially after the first clock signal pulse as a buffer clock signal output to a second buffer stage in a second stage clock path, each having the nominal clock amplitude and the nominal clock pulse width of the clock signal without jitter.

Abstract: A dc-to-dc converter circuit for generating an output voltage from a source voltage includes a plurality of first metal oxide semiconductor field effect transistors (MOSFETs) connected in parallel and collectively defining a gate, a source and a drain. A driver circuit preferably includes a bipolar transistor connected to the gate for turning on the first MOSFETs. A second MOSFET is preferably connected to the gate for turning off the plurality of first MOSFETs. The dc-to-dc converter also preferably includes a clamp circuit connected to the plurality of first MOSFETs across the drain and source thereof. Protection, soft-start and status features are also preferably incorporated into the dc-to-dc converter. A voltage divider is connected to a reference voltage for dividing a first reference voltage to thereby generate a second reference voltage less than a desired output voltage.