Patents by Inventor Wayne Yoshida

Wayne Yoshida has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11309412
    Abstract: A high electron mobility transistor (HEMT) device comprising a substrate, a plurality of semiconductor layers provided on the substrate, and a source terminal, a drain terminal and at least one gate terminal provided on the plurality of semiconductor layers. The HEMT also includes a metal ring formed on the plurality of semiconductor layers around the source terminal, the drain terminal and the at least one gate terminal, where the metal ring operates to shift the pinch-off voltage of the device. In one embodiment, the metal ring includes an ohmic portion and an electrode portion, where both the ohmic portion and the electrode portion include a lower titanium layer, a middle platinum layer and an upper gold layer.
    Type: Grant
    Filed: May 17, 2017
    Date of Patent: April 19, 2022
    Assignee: NORTHROP GRUMMAN SYSTEMS CORPORATION
    Inventors: Xiaobing Mei, Wayne Yoshida
  • Patent number: 9583589
    Abstract: A method for fabricating a double-recess gate structure for an FET device that includes providing a semiconductor wafer having a plurality of semiconductor layers and depositing an EBL resist layer on the wafer. The method also includes patterning the EBL resist layer to form an opening in the EBL resist layer and performing a first wet etch to form a first recess in the wafer. The method further includes depositing a dielectric layer over the EBL resist layer and into the first recess and performing a dry etch to remove a portion of the dielectric layer in the first recess. The method also includes performing a second wet etch through the opening in the dielectric layer to form a second recess, and depositing a gate metal layer in the first and second recesses and in the opening in the EBL resist layer to form a gate terminal.
    Type: Grant
    Filed: October 14, 2015
    Date of Patent: February 28, 2017
    Assignee: Northrop Grumman Systems Corporation
    Inventors: Xiaobing Mei, Ling-Shine Lee, Michael D. Lange, Wayne Yoshida, Po-Hsin Liu
  • Patent number: 7709860
    Abstract: In a method of forming a semiconductor device on a semiconductor substrate (100), a photoresist layer (102) is deposited on the semiconductor substrate; a window (106) is formed in the photoresist layer (102) by electron beam lithography; a conformal layer (108) is deposited on the photoresist layer (102) and in the window (106); and substantially all of the conformal layer (108) is selectively removed from the photoresist layer (102) and a bottom portion of the window to form dielectric sidewalls (110) in the window (106).
    Type: Grant
    Filed: April 29, 2009
    Date of Patent: May 4, 2010
    Assignee: Northrop Grumman Space & Mission Systems Corp.
    Inventors: Linh Dang, Wayne Yoshida, Xiaobing Mei, Jennifer Wang, Po-Hsin Liu, Jane Lee, Weidong Liu, Michael Barsky, Richard Lai
  • Patent number: 7582518
    Abstract: In a method of forming a semiconductor device on a semiconductor substrate (100), a photoresist layer (102) is deposited on the semiconductor substrate; a window (106) is formed in the photoresist layer (102) by electron beam lithography; a conformal layer (108) is deposited on the photoresist layer (102) and in the window (106); and substantially all of the conformal layer (108) is selectively removed from the photoresist layer (102) and a bottom portion of the window to form dielectric sidewalls (110) in the window (106).
    Type: Grant
    Filed: November 14, 2006
    Date of Patent: September 1, 2009
    Assignee: Northrop Grumman Space & Mission Systems Corp.
    Inventors: Linh Dang, Wayne Yoshida, Gerry Mei, Jennifer Wang, Po-Hsin Liu, Jane Lee, Weidong Liu, Mike Barsky, Rich Lai
  • Publication number: 20090206369
    Abstract: In a method of forming a semiconductor device on a semiconductor substrate (100), a photoresist layer (102) is deposited on the semiconductor substrate; a window (106) is formed in the photoresist layer (102) by electron beam lithography; a conformal layer (108) is deposited on the photoresist layer (102) and in the window (106); and substantially all of the conformal layer (108) is selectively removed from the photoresist layer (102) and a bottom portion of the window to form dielectric sidewalls (110) in the window (106).
    Type: Application
    Filed: April 29, 2009
    Publication date: August 20, 2009
    Applicant: NORTHROP GRUMMAN SPACE & MISSION SYSTEMS CORP.
    Inventors: Linh Dang, Wayne Yoshida, Xiaobing Mei, Jennifer Wang, Po-Hsin Liu, Jane Lee, Weidong Liu, Michael Barsky, Richard Lai
  • Publication number: 20080111157
    Abstract: In a method of forming a semiconductor device on a semiconductor substrate (100), a photoresist layer (102) is deposited on the semiconductor substrate; a window (106) is formed in the photoresist layer (102) by electron beam lithography; a conformal layer (108) is deposited on the photoresist layer (102) and in the window (106); and substantially all of the conformal layer (108) is selectively removed from the photoresist layer (102) and a bottom portion of the window to form dielectric sidewalls (110) in the window (106).
    Type: Application
    Filed: November 14, 2006
    Publication date: May 15, 2008
    Applicant: Northrop Grumman Corporation
    Inventors: Linh Dang, Wayne Yoshida, Xiaobing Mei, Jennifer Wang, Po-Hsin Liu, Jane Lee, Weidong Liu, Michael Barsky, Richard Lai