Patents by Inventor Wee Keong Liew

Wee Keong Liew has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6897555
    Abstract: A BGA package having a multiplicity of power segments configured for power connection to integrated circuit die is disclosed. The BGA package substrate includes an integrated circuit die and a ground ring. The substrate also includes a first power ring with a plurality of spaced apart first power ring segments arranged around the die. A second power ring having a plurality of spaced apart conductive second ring segments is also formed around the die. A plurality of vias that penetrate through the substrate are provided to accommodate electrical connections to the segments of the first and second power rings and to the ground ring. The package includes bonding wires for connecting the die to the first and second ring segments and ground ring. Additionally, the package is commonly encapsulated to protect the die and wires.
    Type: Grant
    Filed: July 23, 2003
    Date of Patent: May 24, 2005
    Assignee: LSI Logic Corporation
    Inventors: Hong Tee Lim, Wee Keong Liew, Chengyu Guo
  • Patent number: 6608376
    Abstract: An integrated circuit package is provided that allows high density routing of signal lines. A substrate of the package may include an upper surface upon which a bonding finger resides, a lower surface upon which a solder ball resides, and a signal conductor plane on which a signal trace conductor resides a dielectrically spaced distance between the upper surface and the lower surface. A first via may extend perpendicularly from the upper surface, connecting the bonding finger to the first portion of the signal trace conductor. A second via may extend perpendicularly from the lower surface, connecting the solder ball to the second portion of the signal trace conductor. The routing of the vias and signal trace conductors may cause the signal lines to either fan into or away from the area of the integrated circuit package adapted to receive the integrated circuit.
    Type: Grant
    Filed: March 25, 2002
    Date of Patent: August 19, 2003
    Assignee: LSI Logic Corporation
    Inventors: Wee Keong Liew, Aritharan Thurairajaratnam, Maniam Alagaratnam