Abstract: A parameter monitor and method for monitoring a parameter of a passive component on an integrated circuit. The parameter monitor includes an oscillator circuit. The parameter monitor also includes circuitry configured to measure a first time period of an oscillation of the oscillator circuit with a passive component to produce a first digital count value, to measure second time period of an oscillation of the oscillator circuit without the passive component to produce a second digital count value, and generate a code indicative of a value of or a variation in the value of the passive component using the first and second digital count values.

Abstract: A parameter monitor and method for monitoring a parameter of a passive component on an integrated circuit. The parameter monitor includes an oscillator circuit. The parameter monitor also includes circuitry configured to measure a first time period of an oscillation of the oscillator circuit with a passive component to produce a first digital count value, to measure second time period of an oscillation of the oscillator circuit without the passive component to produce a second digital count value, and generate a code indicative of a value of or a variation in the value of the passive component using the first and second digital count values.

Abstract: A proximity sensing method employed by a wireless communications device includes the steps of: performing a first predetermined operation to detect a presence of at least a transponder in the proximity of the wireless communications device; when the presence of a transponder in the proximity of the wireless communications device is not detected by the first predetermined operation, performing a second predetermined operation to obtain a first characteristic value and after a period of time, performing the second predetermined operation to obtain a second characteristic value sequentially; checking if the first characteristic value and the second characteristic value satisfy a predetermined criteria; and when the predetermined criterion is satisfied, performing the first predetermined operation again to check the presence of the transponder in the proximity of the wireless communications device.

Abstract: A proximity sensing method employed by a wireless communications device includes the steps of: performing a first predetermined operation to detect a presence of at least a transponder in the proximity of the wireless communications device; when the presence of a transponder in the proximity of the wireless communications device is not detected by the first predetermined operation, performing a second predetermined operation to obtain a first characteristic value and after a period of time, performing the second predetermined operation to obtain a second characteristic value sequentially; checking if the first characteristic value and the second characteristic value satisfy a predetermined criteria; and when the predetermined criterion is satisfied, performing the first predetermined operation again to check the presence of the transponder in the proximity of the wireless communications device.

Abstract: An integrated circuit and an apparatus are provided. The integrated circuit comprises a bias circuit, an LC resonator circuit, and a current mode logic (CML) frequency divider. The bias circuit generates first and second bias voltages. The LC resonator circuit generates an oscillation signal having an oscillation frequency. The CML frequency divider, coupled to the bias circuit and the LC resonator circuit, biased by the first and second bias voltages, receives the oscillation signal to generate an output signal having an output frequency with a fractional rate of the oscillation frequency. The oscillation signal comprises AC and DC components, the CML frequency divider receives the AC component to determine an injected frequency and reuses the DC component to provide tail currents to determine a natural frequency of the CML frequency divider. The output frequency is determined by the injected frequency and the natural frequency.

Abstract: A receiver includes a mixer, a poly phase filter, a channel select filter, an analog-to-digital converter and a HI/LO side reject selection unit. The mixer downconverts a signal to generate an in-phase signal and a quadrature signal. The poly phase filter for generates differential IF signals based on the in-phase signal and the quadrature signal. The channel select filter filters out unwanted channel signals from the differential IF signals. The analog-to-digital converter converts the filtered signal into a digital output signal. The HI/LO side reject selection unit is coupled between the mixer and the poly phase filter and capable of rejecting image signals while the mixer is at a high side frequency or at a low side frequency.

Abstract: A Global Positioning System (GPS) receiver integrated with a cellular phone system, comprising a single-balanced mixer, a poly phase filter, a channel select filter, an analog-to-digital converter, a reference frequency source, and a PLL unit is disclosed. The single-balanced mixer downconverts a GPS signal to generate an in-phase signal I and a quadrature signal Q. The poly phase filter generates an IF signal based on the in-phase signal I and the quadrature signal Q. The channel select filter receives the IF signal to filter unwanted channel signals. The analog-to-digital converter converts the signal from the channel select filter to a digital output signal. The reference frequency source provides a reference frequency to the analog-to-digital converter. The PLL unit receives the reference frequency for generating a clock signal to the single-balanced mixer for downconversion.

Abstract: A system capable of limiting a current through a load and a method thereof. The system comprises a current sensor, a determination circuit, and a current mirror circuit. The current sensor, coupled to the load, produces a current indication indicating the current. The determination circuit, coupled to the current sensor, generates a short-circuit signal when the current exceeds a predetermined threshold. The current mirror circuit, coupled to a voltage source, the current sensor and the determination circuit, comprises a current mirror and a bypass path, delivers a mirrored current from the current mirror to the load upon receiving the short-circuit signal, and passes the current from the voltage source through the bypass path to the load in the absence of the short-circuit signal.

Abstract: An integrated circuit and an apparatus are provided. The integrated circuit comprises a bias circuit, an LC resonator circuit, and a current mode logic (CML) frequency divider. The bias circuit generates first and second bias voltages. The LC resonator circuit generates an oscillation signal having an oscillation frequency. The CML frequency divider, coupled to the bias circuit and the LC resonator circuit, biased by the first and second bias voltages, receives the oscillation signal to generate an output signal having an output frequency with a fractional rate of the oscillation frequency. The oscillation signal comprises AC and DC components, the CML frequency divider receives the AC component to determine an injected frequency and reuses the DC component to provide tail currents to determine a natural frequency of the CML frequency divider. The output frequency is determined by the injected frequency and the natural frequency.

Abstract: A variable gain amplifying circuit comprises two stages, a first stage and a second stage with a common voltage-to-current converter. Each stage comprises two BJTs, two voltage controlled current sources, a variable resistor with a variable resistance, and the common voltage-to-current converter. The two BJTs construct a differential amplifier for amplifying a pair of differential signals. The variable resistor with the variable resistance is connected between the emitters of the two BJTs wherein the variable resistance of the variable resistor is represented as RE. The variable resistance RE is controlled by a control voltage Vctrl. The two voltage controlled current sources are respectively connected between the corresponding emitter of BJTs and ground. The currents respectively through the voltage controlled current sources are equal to each other and represented as IE. The current IE is controlled by the common voltage-to-current converter according the control voltage Vctrl.

Abstract: A variable gain amplifying circuit comprises two stages, a first stage and a second stage with a common voltage-to-current converter. Each stage comprises two BJTs, two voltage controlled current sources, a variable resistor with a variable resistance, and the common voltage-to-current converter. The two BJTs construct a differential amplifier for amplifying a pair of differential signals. The variable resistor with the variable resistance is connected between the emitters of the two BJTs wherein the variable resistance of the variable resistor is represented as RE. The variable resistance RE is controlled by a control voltage Vctrl. The two voltage controlled current sources are respectively connected between the corresponding emitter of BJTs and ground. The currents respectively through the voltage controlled current sources are equal to each other and represented as IE. The current IE is controlled by the common voltage-to-current converter according the control voltage Vctrl.

Abstract: A Global Positioning System (GPS) receiver integrated with a cellular phone system, comprising a single-balanced mixer, a poly phase filter, a channel select filter, an analog-to-digital converter, a reference frequency source, and a PLL unit is disclosed. The single-balanced mixer downconverts a GPS signal to generate an in-phase signal I and a quadrature signal Q. The poly phase filter generates an IF signal based on the in-phase signal I and the quadrature signal Q. The channel select filter receives the IF signal to filter unwanted channel signals. The analog-to-digital converter converts the signal from the channel select filter to a digital output signal. The reference frequency source provides a reference frequency to the analog-to-digital converter. The PLL unit receives the reference frequency for generating a clock signal to the single-balanced mixer for downconversion.

Abstract: A system capable of limiting a current through a load and a method thereof. The system comprises a current sensor, a determination circuit, and a current mirror circuit. The current sensor, coupled to the load, produces a current indication indicating the current. The determination circuit, coupled to the current sensor, generates a short-circuit signal when the current exceeds a predetermined threshold. The current mirror circuit, coupled to a voltage source, the current sensor and the determination circuit, comprises a current mirror and a bypass path, delivers a mirrored current from the current mirror to the load upon receiving the short-circuit signal, and passes the current from the voltage source through the bypass path to the load in the absence of the short-circuit signal.

Abstract: Resistor string DAC's are known to utilize lots of area and slow in data conversion due to the large utilization of switches. The problem becomes worse when differential outputs are required in the conversion process. This invention describes a N-bit DAC architecture utilizing a substantially lower number of switches through a unique placement of tap-points in the resistor string and decode logic. Differential outputs share the same set of switches through 2 levels of decoding.

Abstract: Resistor string DAC's are known to utilize lots of area and slow in data conversion due to the large utilization of switches. The problem becomes worse when differential outputs are required in the conversion process. This invention describes a N-bit DAC architecture utilizing a substantially lower number of switches through a unique placement of tap-points in the resistor string and decode logic. Differential outputs share the same set of switches through 2 levels of decoding.

Abstract: Disclosed is a single-stage, switched capacitor circuit for measuring changes in a variable by measuring changes in a capacitor gap. The change in the capacitor gap corresponds directly to a change in a measurable variable, such as pressure and acceleration, and thus a change in voltage. The circuit includes at least one reference capacitor, a sensor capacitor, a plurality of switches responsive to a timing device, and a device for generating substantially constant reference voltages. The sensor circuit does not result in a DC offset value, but results in the AC component of the voltage being directly proportional to the change in the variable through a substantially constant voltage is supplied to a node near the sensor capacitance. The circuit may be trimmed using a digital to analog converter and/or capacitors coupled in parallel.

Abstract: Disclosed is a single-stage, switched capacitor circuit for measuring changes in a variable by measuring changes in a capacitor gap. The change in the capacitor gap corresponds directly to a change in a measurable variable, such as pressure and acceleration, and thus a change in voltage. The circuit includes at least one reference capacitor, a sensor capacitor, a plurality of switches responsive to a timing device, and a device for generating substantially constant reference voltages. The sensor circuit does not result in a DC offset value, but results in the AC component of the voltage being directly proportional to the change in the variable through a substantially constant voltage is supplied to a node near the sensor capacitance. The circuit may be trimmed using a digital to analog converter and/or capacitors coupled in parallel.