Abstract: Monolithic integrated device having an architecture that allows an acoustic device to transduce either surface acoustic waves or bulk acoustic waves, comprising: a substrate layer being the base of the device; an inter-layer dielectric disposed on top of the substrate layer; an electronic circuitry substantially formed in the inter-layer dielectric and supported by the substrate layer, the electronic circuitry comprises a plurality of metal layers; and a piezoelectric layer being sandwiched between a top electrode and a bottom electrode within the inter-layer dielectric. The top electrode is an upper metal layer belonging to the electronic circuitry and the bottom electrode is a lower metal layer belonging to the electronic circuitry. To transduce the bulk acoustic waves, the inter-layer dielectric is formed with a top cavity above the top electrode and a bottom cavity below the bottom electrode.

Abstract: Monolithic integrated device having an architecture that allows an acoustic device to transduce either surface acoustic waves or bulk acoustic waves, comprising: a substrate layer being the base of the device; an inter-layer dielectric disposed on top of the substrate layer; an electronic circuitry substantially formed in the inter-layer dielectric and supported by the substrate layer, the electronic circuitry comprises a plurality of metal layers; and a piezoelectric layer being sandwiched between a top electrode and a bottom electrode within the inter-layer dielectric. The top electrode is an upper metal layer belonging to the electronic circuitry and the bottom electrode is a lower metal layer belonging to the electronic circuitry. To transduce the bulk acoustic waves, the inter-layer dielectric is formed with a top cavity above the top electrode and a bottom cavity below the bottom electrode.

Abstract: A method for manufacturing a planarized reflective layer disposed on a hinge layer connected to a hinge support post (210) is disclosed. The method comprises depositing a first layer of a first material to form the hinge layer (206), patterning a first mask over the first layer and selectively removing the first material not covered by any of the first mask to form a plurality of recesses, depositing a second layer of a second material over the first layer, patterning a second mask over the second layer and selectively removing the second material not covered by any of the second mask to form a hinge component (212), depositing a reflective layer (202) of a reflective material over the second layer and planarizing the reflective layer (202) to form a substantially planar reflective surface.

Abstract: A new method for forming planarized high quality oxide shallow trench isolation is described. A nitride layer overlying a pad oxide layer is provided over the surface of a semiconductor substrate. A plurality of isolation trenches is etched through the nitride and pad oxide layers into the semiconductor substrate wherein there is at least one first wide nitride region between two of the isolation trenches and at least one second narrow nitride region between another two of the isolation trenches. A high density plasma (HDP) oxide layer is deposited over the nitride layer filling the isolation trenches wherein the HDP oxide deposits more thickly in the first region over the wide nitride layer and deposits more thinly in the second region over the narrow nitride layer and wherein the difference in step heights of the HDP oxide between the first region and a region overlying an isolation trench is a first height.