Patents by Inventor Wei An

Wei An has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10636715
    Abstract: A semiconductor package including a circuit substrate, an interposer structure, a plurality of dies, and an insulating encapsulant is provided. The interposer structure is disposed on the circuit substrate. The plurality of dies is disposed on the interposer structure, wherein the plurality of dies is electrically connected to the circuit substrate through the interposer structure. The insulating encapsulant is disposed on the circuit substrate, wherein the insulating encapsulant surrounds the plurality of dies and the interposer structure and encapsulates at least the interposer structure, the insulating encapsulant has a groove that surrounds the interposer structure and the plurality of dies, and the interposer structure and the plurality of dies are confined to be located within the groove.
    Type: Grant
    Filed: January 19, 2018
    Date of Patent: April 28, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chun-Cheng Lin, Ching-Hua Hsieh, Chen-Hua Yu, Chung-Shi Liu, Chih-Wei Lin
  • Patent number: 10636847
    Abstract: A display may have an array of pixels. Display driver circuitry may supply data and control signals to the pixels. Each pixel may have seven transistors, a capacitor, and a light-emitting diode such as an organic light-emitting diode. The seven transistors may receive control signals using horizontal control lines. Each pixel may have first and second emission enable transistors that are coupled in series with a drive transistor and the light-emitting diode of that pixel. The first and second emission enable transistors may be coupled to a common control line or may be separately controlled so that on-bias stress can be effectively applied to the drive transistor. The display driver circuitry may have gate driver circuits that provide different gate line signals to different rows of pixels within the display. Different rows may also have different gate driver strengths and different supplemental gate line loading structures.
    Type: Grant
    Filed: December 18, 2018
    Date of Patent: April 28, 2020
    Assignee: Apple Inc.
    Inventors: Cheng-Ho Yu, Chin-Wei Lin, Shyuan Yang, Ting-Kuo Chang, Tsung-Ting Tsai, Warren S. Rieutort-Louis, Shih-Chang Chang, Yu Cheng Chen, John Z. Zhong
  • Patent number: 10631724
    Abstract: An optical measurement instrument performs a series of wavefront measurements to obtain a plurality of sets of wavefront aberrometry data for an eye, and performs a series of corneal topography measurements to obtain a plurality of sets of corneal topography data for the eye. Each set of wavefront aberrometry data is obtained at a corresponding different point in time, and each set of corneal topography data is obtained at a corresponding different point in time. The wavefront aberrometry data and the corneal topography data are processed to produce combined tear film breakup data as a function of time. The combined tear film breakup data may be employed as a metric for evaluating a level of tear film breakup of the eye as a function of time.
    Type: Grant
    Filed: February 22, 2018
    Date of Patent: April 28, 2020
    Assignee: AMO Development, LLC
    Inventors: Daniel R. Neal, Richard J. Copland, Jason Hoy, Wei Xiong
  • Patent number: 10637348
    Abstract: A gate driver circuit includes an input terminal for receiving an input switching signal for driving a switching circuit that has a high-side transistor and a low-side transistor vertically stacked. The gate driver circuit also includes a dead-time control circuit, that includes two dead-time measurement circuits. The first dead-time measurement circuit produces a first pulse signal having a first pulse width representing a first dead-time between when a gate voltage of the low-side transistor falls below a first threshold voltage and when a gate voltage of the high-side transistor rises above a second threshold voltage. The second dead-time measurement circuit produces a second pulse signal having a second pulse width representing a second dead-time between when the gate voltage of the high-side transistor falls below the second threshold voltage and when the gate voltage of the low-side transistor rises above the second threshold voltage.
    Type: Grant
    Filed: June 10, 2019
    Date of Patent: April 28, 2020
    Assignee: Diodes Incorporated
    Inventor: Wei Wu
  • Patent number: 10633902
    Abstract: A hydraulic door closer capable of reducing oil-pressure therein at high temperature, comprises a housing with an oil chamber, an oil storage cavity, and a piston in the housing of the hydraulic door closer. The oil storage cavity is in communication with the oil chamber; when the oil temperature increases, hydraulic oil in the oil chamber and oil storage cavity generates an increased oil pressure move the piston, whereby volume of the oil storage cavity is enlarged, such that oil from the chamber will flow into the cavity, to reduce the oil pressure of the chamber and cavity. When the oil temperature decreases, the oil pressure in the chamber and cavity is reduced, whereby the storage piston restores its original position, whereby volume of the cavity will be reduced, and the oil in the cavity flows back into the chamber. The pressure in the oil chamber is reduced when the hydraulic oil expands due to increased temperature to prevent failure of the seal and to avoid hydraulic oil leakage.
    Type: Grant
    Filed: July 15, 2016
    Date of Patent: April 28, 2020
    Assignee: CMECH (GUANGZHOU) LTD.
    Inventor: Wei Jin Chao
  • Patent number: 10638518
    Abstract: Provided are a random access method, apparatus and system. The method includes: receiving, by a user equipment, configuration information of a Physical Random Access Channel (PRACH) dedicated for a super real-time service and/or configuration information of a preamble dedicated for the super real-time service notified by a base station; and when the user equipment has the super real-time service and has a short Transmission Time Interval (TTI) support capability, by the user equipment, transmitting a preamble to the base station through a PRACH resource dedicated for the super real-time service or transmitting the preamble dedicated for the super real-time service to the base station according to the configuration information of the PRACH dedicated for the super real-time service and/or the configuration information of the preamble dedicated for the super real-time service, so as to trigger the base station to allocate a short TTI resource to the user equipment.
    Type: Grant
    Filed: April 12, 2016
    Date of Patent: April 28, 2020
    Assignee: ZTE Corporation
    Inventors: Xu Liu, Qian Dai, Jianxun Ai, Wei Zou
  • Patent number: 10636873
    Abstract: A method of fabricating a semiconductor device is provided. In the method, a gate structure is formed on a semiconductor substrate. A photolithography process is performed with a mask having two transparent regions to form a photoresist layer having two openings in the semiconductor substrate. A first photoresist layer of the photoresist layer between the two openings is aligned to the gate structure and formed on the gate structure. The width of the first photoresist layer is shorter than the width of the gate structure such that a first side portion and a second side portion of the gate structure are exposed from both sides of the first photoresist layer, respectively. Next, an ion implantation process is performed to form lightly doped drain regions in the semiconductor substrate which are on two opposite sides of the gate structure of the photoresist layer.
    Type: Grant
    Filed: November 22, 2017
    Date of Patent: April 28, 2020
    Assignee: Vanguard International Semiconductor Corporation
    Inventors: Chih-Wei Lin, Tsung-Han Lin, Chao-Wei Wu, Yen-Kai Chen
  • Patent number: 10633537
    Abstract: A thermoplastic composition includes from 29.9 wt % to 84.9 wt % of a base resin including poly(p-phenylene oxide) (PPO), polystyrene (PS) and an impact modifier; from 15 wt % to 70 wt % of a dielectric filler; and from 0.1 wt % to 10 wt % of an impact promoter including a polycarbonate-siloxane copolymer, a polyolefin-siloxane copolymer, or a combination thereof. The thermoplastic composition has a dielectric constant (Dk) of from 3.0-8.0 between 1 and 5 gigahertz (GHz) and a dissipation factor (Df) of less than 0.003 between 1 and 5 GHz. Articles including the thermoplastic composition, and in particular telecommunications devices, are also described.
    Type: Grant
    Filed: July 1, 2019
    Date of Patent: April 28, 2020
    Assignee: SABIC Global Technologies B.V.
    Inventors: Jian Wang, Wei Shan, Xing Liu
  • Patent number: 10633557
    Abstract: A process for chemical mechanical polishing a substrate containing tungsten to reduce static corrosion rate and inhibit dishing of the tungsten and erosion of underlying dielectrics is disclosed. The process includes providing a substrate; providing a polishing composition, containing, as initial components: water; an oxidizing agent; xanthan gum; a dicarboxylic acid, a source of iron ions; a colloidal silica abrasive; and, optionally a pH adjusting agent; optionally a surfactant; providing a chemical mechanical polishing pad, having a polishing surface; creating dynamic contact at an interface between the polishing pad and the substrate; and dispensing the polishing composition onto the polishing surface at or near the interface between the polishing pad and the substrate; wherein some of the tungsten (W) is polished away from the substrate, static corrosion rate is reduced, dishing of the tungsten (W) is inhibited as well as erosion of dielectrics underlying the tungsten (W).
    Type: Grant
    Filed: September 29, 2016
    Date of Patent: April 28, 2020
    Assignee: Rohm and Haas Electronic Materials CMP Holdings, Inc.
    Inventors: Lin-Chen Ho, Wei-Wen Tsai, Cheng-Ping Lee
  • Patent number: 10637242
    Abstract: A micro-grid dynamic stability control system includes: a micro-grid dynamic stability control device, configured to calculate a power factor based on a real-time voltage and current of a bus; a central control device, configured to transmit a reactive power control instruction if the power factor is lower than a predefined threshold; and at least one local control device, configured to transmit a control signal to the micro-grid dynamic stability control device and at least one distributed power supply controlled by the at least one local control device. In response to the control signal, the micro-grid dynamic stability control device compensates the voltage of the bus with droop control, and the at least one distributed power supply outputs a reactive power to the bus to increase the power factor of the bus.
    Type: Grant
    Filed: June 29, 2017
    Date of Patent: April 28, 2020
    Assignee: JIANGSU GOLDWIND SCIENCE & TECHNOLOGY CO., LTD.
    Inventors: Dehua Zheng, Wei Zhang, Dan Wei, Fudong Qiu
  • Patent number: 10636775
    Abstract: A package structure and the manufacturing method thereof are provided. The package structure includes a first package including at least one first semiconductor die encapsulated in an insulating encapsulation and through insulator vias electrically connected to the at least one first semiconductor die, a second package including at least one second semiconductor die and conductive pads electrically connected to the at least one second semiconductor die, and solder joints located between the first package and the second package. The through insulator vias are encapsulated in the insulating encapsulation. The first package and the second package are electrically connected through the solder joints. A maximum size of the solder joints is greater than a maximum size of the through insulator vias measuring along a horizontal direction, and is greater than or substantially equal to a maximum size of the conductive pads measuring along the horizontal direction.
    Type: Grant
    Filed: October 27, 2017
    Date of Patent: April 28, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Wei-Yu Chen, An-Jhih Su, Chi-Hsi Wu, Der-Chyang Yeh, Li-Hsien Huang, Po-Hao Tsai, Ming-Shih Yeh, Ta-Wei Liu
  • Patent number: 10632447
    Abstract: Design, fabrication, and usage of a reactor are presented for synthesis of structured materials from a liquid-phase precursor by heating. The structured materials are particles, membranes or films of micro-porous molecular sieve crystals such as zeolite and meso-porous materials. The precursor solution and structured materials in the reactor are uniformly heated by a planar heater with characteristic heat transfer dimension in the range of 3 mm to 10 cm. A planar heater having width and length at least three times of the characteristic heat transfer dimension provides at least one surface of uniform temperature distribution for heating purposes. Heating is conducted over a temperature range of 20 to 300° C. The planar heater can be heated by electrical power of by thermal fluid.
    Type: Grant
    Filed: December 28, 2018
    Date of Patent: April 28, 2020
    Assignee: Molecule Works Inc.
    Inventor: Wei Liu
  • Patent number: 10637458
    Abstract: The present disclosure provides a series-connected SiC MOSFET drive circuit based on multi-winding transformer coupling. The drive circuit is mainly composed of a transformer, an energy storage capacitor and a push-pull circuit. The transformer plays a role of constraining a relationship between gate-source voltages of series-connected SiC MOSFETs to ensure that a drive voltage of each SiC MOSET in series is synchronously increased and decreased, and to prevent the problem of a dynamic voltage imbalance at moments of conduction and cutoff due to the desynchrony of the drive voltages. Both the energy storage capacitor and the push-pull structure are used to ensure that the SiC MOSFETs have sufficient drive currents at the moment of conduction to achieve fast conduction of the SiC MOSFETs. Meanwhile, a discharge loop is constructed for the gate-source voltages at the moment of cutoff to ensure that the drive voltages drop in a short period of time.
    Type: Grant
    Filed: October 9, 2019
    Date of Patent: April 28, 2020
    Assignee: HARBIN INSTITUTE OF TECHNOLOGY
    Inventors: Wei Wang, Panbao Wang, Gaolin Wang, Guihua Liu, Sibao Ding, Yijie Wang, Dianguo Xu
  • Patent number: 10637129
    Abstract: A wearable computing device can include a monopole-excited slot antenna formed by a gap between a housing (such as a highly conductive housing) and a bracket (such as a highly conductive bracket) within the highly conductive housing and by a back cavity between the highly conductive bracket and the PCB. The antenna configuration can include a monopole antenna electrically coupled to a printed circuit board and a slot antenna that is excited through coupled electromagnetic fields. The highly conductive bracket is positioned near a display window of the device, mostly below and partially enclosing a battery. The highly conductive bracket is positioned above the printed circuit board. This configuration allows for a relatively small dead band in the display window, a larger battery, compact and mechanically simple configuration, and superior water resistance.
    Type: Grant
    Filed: January 22, 2019
    Date of Patent: April 28, 2020
    Assignee: Fitbit, Inc.
    Inventors: Yonghua Wei, Kevin Li, Patrick James Markan, Allen Yu-Li Wang, Teemu Taneli Raafael Kaiponen, Christos Kinezos Ioannou
  • Patent number: 10632227
    Abstract: A discovery of the conversion of amorphous calcium polyphosphate (ACPP) or/and other polyphosphate salts with various type of calcium phosphate to new calcium phosphate product (i.e. dicalcium phosphate dihydrate (DCPD)) in a liquid environment. The discovery includes mixing a various type of calcium phosphate with an aqueous ACPP or/and other polyphosphate salts gel, which is fast setting and possessing strong mechanical strength, and can be gradually converted to DCPD/hydroxyapatites in physiological condition. This injectable past can be applied as alternative of conventional CPC bone cement that is suitable for bone void repair due to its excellent properties in osteoconductivity and osseointegration. It can also be applied as drug delivery device in tissue engineering for its strong bonding to drug molecules.
    Type: Grant
    Filed: February 8, 2016
    Date of Patent: April 28, 2020
    Assignee: Wayne State University
    Inventors: Weiping Ren, Wei Song
  • Patent number: 10634751
    Abstract: A method for modifying RF pulse infidelity is provided. The method may include obtaining a designed time-domain waveform. The method may also include directing a radio frequency power amplifier (RFPA) of a magnetic resonance imaging (MRI) scanner to generate an output RF pulse based on the designed time-domain waveform. The method may also include measuring an output time-domain waveform of the output RF pulse. The method may also include determining, based on the designed time-domain waveform and the output time-domain waveform, a modified time-domain waveform corresponding to an excitation RF pulse. The method may also include directing the MRI scanner to generate, using a waveform generator and the RFPA and based on the modified time-domain waveform, the excitation RF pulse to excite one or more slices of an object in an MRI scan.
    Type: Grant
    Filed: September 30, 2017
    Date of Patent: April 28, 2020
    Assignee: UIH AMERICA, INC.
    Inventors: Yuan Zheng, Jinbo Ma, Yu Ding, Qing Wei, Zhenhua Shen
  • Patent number: 10635001
    Abstract: A photolithiographic method for fabricating bank structures with improved non-wetting properties to form well regions on a substrate using a photoresist composition comprising a cresol novolak resin, a photoactive diazonaphthoquinone sulfonic ester of a polyhydroxybenzophenone compound with at least one free hydroxyl group, and a non-ionic urethane polyglycol fluorosurfactant. Inkjet methods can be used to deposit active materials into the well areas. Color filter arrays and optoelectronic devices such as OLED devices can be made by this method.
    Type: Grant
    Filed: July 25, 2016
    Date of Patent: April 28, 2020
    Assignee: Merck Patent GmbH
    Inventors: Li Wei Tan, Pawel Miskiewicz, Graham Smith
  • Patent number: D882483
    Type: Grant
    Filed: December 7, 2018
    Date of Patent: April 28, 2020
    Assignee: NIO NEXTEV LIMITED
    Inventors: Kris Tomasson, Juho Suh, Jim Basté, Kevyn Gruchala, Xingshun Wei
  • Patent number: D882490
    Type: Grant
    Filed: August 1, 2018
    Date of Patent: April 28, 2020
    Assignee: RAZOR USA LLC
    Inventor: Joey Chih-Wei Huang
  • Patent number: D882664
    Type: Grant
    Filed: March 14, 2019
    Date of Patent: April 28, 2020
    Assignee: VIVOTEK INC.
    Inventors: Wei-Kai Tang, Chih-Hao Chen