Abstract: An optical transceiver includes an input assembly, an output port, a fiber patch panel, multiple first optical fibers and multiple second optical fibers. The input assembly is arranged on a circuit board and has a first input port and a second input port. The fiber patch panel is arranged between the input assembly and the output port, and has multiple first fiber patch slots and multiple second fiber patch slots. The first optical fibers are connected to the first input port and the output port. The first optical fiber passes through the first fiber patch slot and the second fiber patch slot. The second optical fibers are connected to the second input port and the output port. The second optical fiber passes through the first fiber patch slot and the second fiber patch slot. The second fiber patch slot accommodates the first optical fiber and the second optical fiber.

Abstract: A power converter is provided. The power converter includes a switched-capacitor conversion circuit and an inductor buck circuit. The switched-capacitor conversion circuit receives an input voltage at an input terminal and performs a switching operation to convert the input voltage to an intermediate voltage. The inductor buck circuit is coupled to an output terminal of the switched-capacitor conversion circuit to receive the intermediate voltage and operates at a constant on-time to generate an output voltage at a conversion output terminal according to the intermediate voltage. The inductor buck circuit includes an inductor. In response to that a state of an inductor current used for charging the inductor corresponds to a predetermined condition, a switching action of the switching operation is enabled, so that the switched-capacitor conversion circuit is switched from a first turned-on state to a second turned-on state.

Abstract: An embodiment of the present disclosure provides a conversion circuit for converting a single-ended input to a differential input, which has fewer switches and fewer capacitors. This conversion circuit increases the signal-to-noise ratio (SNR), and the conversion circuit directly uses the higher supply voltage AVDD without being bucked by the regulator, wherein the common mode voltage is AVDD/2N, and N is greater than 1. Overall, not only the circuit area is smaller and the SNR is higher, but also the manufacturing cost is reduced. In addition, compared with the prior art, the conversion circuit of the embodiment of the present disclosure has only three operation periods, so the control is simpler and the operation speed is faster.

Abstract: A power supply device is provided with a secure power supply device, a voltage detection circuit, a stable voltage source and a switch. By using the voltage detection circuit, whether a driving voltage of an encryption/decryption device is insufficient to control the on and off the switch, so as to determine whether only the secure power supply device provides a supply voltage to the encryption/decryption device as the driving voltage. Alternatively, the supply voltage of the secure power supply device and a stable voltage of the stable voltage source are provided simultaneously to the encryption/decryption device as the driving voltage. In other words, once the driving voltage drops (that is, the encryption/decryption device consumes a large current for encryption/decryption), the stable voltage source immediately provides the stable voltage to the encryption/decryption device as part of the driving voltage to ensure that the encryption/decryption device can normally work.

Abstract: A voltage regulation system is provided. In the voltage regulation system, a frequency of a clock signal is adjusted and a pulse generator is controlled to output a pulse signal to a switch power stage circuit, to enable the switch power stage circuit to adjust an output voltage and output the adjusted output voltage to the load element. Through the aforementioned configuration, the switch power stage circuit adjusts the output voltage according to the situation of the load element, thus decreasing the power loss of the switch power stage circuit.

Abstract: The disclosure relates to an optical transceiver and a manufacturing method thereof. The optical transceiver includes a substrate, a thermal-conductive substrate, a first metal wiring structure, a light-transceiving element and an optical fiber array. The substrate has an opening, and the thermal-conductive substrate is embedded within the opening. The first metal wiring structure is integrally formed on the substrate and the thermal-conductive substrate through an electroplating or a wire-printing process. The light-transceiving element is disposed on the thermal-conductive substrate and is electrically connected to the first metal wiring structure. The optical fiber array is arranged on the thermal-conductive substrate for communication with the light-transceiving element.

Abstract: A power converter is provided. The power converter includes a switched-capacitor conversion circuit and an inductor buck circuit. The switched-capacitor conversion circuit receives an input voltage at an input terminal and performs a switching operation to convert the input voltage to an intermediate voltage. The inductor buck circuit is coupled to an output terminal of the switched-capacitor conversion circuit to receive the intermediate voltage and operates at a constant on-time to generate an output voltage at a conversion output terminal according to the intermediate voltage. The inductor buck circuit includes an inductor. In response to that a state of an inductor current used for charging the inductor corresponds to a predetermined condition, a switching action of the switching operation is enabled, so that the switched-capacitor conversion circuit is switched from a first turned-on state to a second turned-on state.

Abstract: The disclosure relates to an optical transceiver and a manufacturing method thereof. The optical transceiver includes a substrate, a thermal-conductive substrate, a first metal wiring structure, a light-transceiving element and an optical fiber array. The substrate has an opening, and the thermal-conductive substrate is embedded within the opening. The first metal wiring structure is integrally formed on the substrate and the thermal-conductive substrate through an electroplating or a wire-printing process. The light-transceiving element is disposed on the thermal-conductive substrate and is electrically connected to the first metal wiring structure. The optical fiber array is arranged on the thermal-conductive substrate for communication with the light-transceiving element.

Abstract: An optical transceiver includes an input assembly, an output port, a fiber patch panel, multiple first optical fibers and multiple second optical fibers. The input assembly is arranged on a circuit board and has a first input port and a second input port. The fiber patch panel is arranged between the input assembly and the output port, and has multiple first fiber patch slots and multiple second fiber patch slots. The first optical fibers are connected to the first input port and the output port. The first optical fiber passes through the first fiber patch slot and the second fiber patch slot. The second optical fibers are connected to the second input port and the output port. The second optical fiber passes through the first fiber patch slot and the second fiber patch slot. The second fiber patch slot accommodates the first optical fiber and the second optical fiber.

Abstract: A voltage regulation system is provided. In the voltage regulation system, a frequency of a clock signal is adjusted and a pulse generator is controlled to output a pulse signal to a switch power stage circuit, to enable the switch power stage circuit to adjust an output voltage and output the adjusted output voltage to the load element. Through the aforementioned configuration, the switch power stage circuit adjusts the output voltage according to the situation of the load element, thus decreasing the power loss of the switch power stage circuit.

Abstract: A digital background calibration circuit including a digital random number generator, an analog-to-digital converter (ADC) and a plurality of switches is provided. The digital random number generator is configured to generate a first digital sequence having a plurality of bits. The ADC includes a plurality of sampling capacitors. The switches receive the first digital sequence and are coupled to the sampling capacitors. During a calibration period, the digital random number generator controls the sampling capacitors via the switches to sample the first digital sequence.

Abstract: A control system of a switching voltage regulator includes an adjustable switched-capacitor conversion circuit, an error generator, and a controlling module. The adjustable switched-capacitor conversion circuit has a plurality of discrete conversion rates, and selects a corresponding conversion rate and outputs an output voltage according to a signal of the conversion rate. An error generator is connected to the adjustable switched-capacitor conversion circuit and compares the output voltage with an external reference voltage to obtain an error voltage. The controlling module is connected between the error generator and the adjustable switched-capacitor conversion circuit to store a plurality of control variable sets, and selects one of plurality of control variable sets according to the error voltage. Afterwards, the controlling module calculates to output the signal of the conversion rate and further adjust the output voltage according to the selected control variable sets.

Abstract: A digital control system for voltage regulation and a method thereof are disclosed. The digital control system includes an adjustable voltage regulation circuit having multiple discrete conversion ratios, an error generator, a digital controller and a conversion ratio controller. The adjustable voltage regulation circuit, the error generator, the digital controller and the conversion ratio controller form a closed loop control system. The adjustable voltage regulation circuit includes a conversion ratio controlling terminal receiving a conversion ratio signal. The error generator compares an output voltage of the adjustable voltage regulation circuit with a reference voltage to generate an error voltage, and the digital controller outputs a digital control signal to the conversion ratio controller according to the error voltage.

Abstract: A digital background calibration circuit including a digital random number generator, an analog-to-digital converter (ADC) and a plurality of switches is provided. The digital random number generator is configured to generate a first digital sequence having a plurality of bits. The ADC includes a plurality of sampling capacitors. The switches receive the first digital sequence and are coupled to the sampling capacitors. During a calibration period, the digital random number generator controls the sampling capacitors via the switches to sample the first digital sequence.

Abstract: A DC-DC power converter circuit includes a switched-capacitor circuit, an error amplifier, a latched comparator and a switching controller. The error amplifier adjusts an error amplification signal of the error amplifier in response to an output voltage of the switched-capacitor circuit and a reference voltage. The error amplification signal is then fed to the latched comparator as a comparison reference, resulting in the DC-DC power converter circuit being able to more precisely maintain the output voltage within a predetermined range.

Abstract: Illustrated are a switched-capacitor DC-DC convertor and a control method thereof. The switched-capacitor DC-DC convertor includes a switched-capacitor circuit, a latched comparator and a clock generating module. The switched-capacitor circuit converts an input voltage into an output voltage through a phase switching operation. The latched comparator receives a clock signal, and compares the output voltage and a reference voltage according to the clock signal, to generate the control signal, which triggers a phase switching operation of the switched-capacitor circuit. The clock generating module generates the clock signal, and adjusts a frequency of the clock signal according to variation of the control signal.

Abstract: A switched capacitor DC-DC convertor circuit and a production method thereof are described. The switched capacitor DC-DC convertor circuit includes two switched-capacitor circuits each including at least one capacitor, multiple internal switches and the same circuit layout. The internal switches of the two switched-capacitor circuits corresponding in position to each other are controlled by different control signals, and the turn-on durations of the control signals do not overlap. The capacitors of the two switched capacitor circuits are connected by an interconnection switch, and a turn-on duration of a control signal for the interconnection switch also does not overlap with that of the control signals for the internal switches. The switched capacitor DC-DC convertor circuit has a lower switching power loss compared to current state of the art.

Abstract: A switched capacitor DC-DC convertor circuit and a production method thereof are described. The switched capacitor DC-DC convertor circuit includes two switched-capacitor circuits each including at least one capacitor, multiple internal switches and the same circuit layout. The internal switches of the two switched-capacitor circuits corresponding in position to each other are controlled by different control signals, and the turn-on durations of the control signals do not overlap. The capacitors of the two switched capacitor circuits are connected by an interconnection switch, and a turn-on duration of a control signal for the interconnection switch also does not overlap with that of the control signals for the internal switches. The switched capacitor DC-DC convertor circuit has a lower switching power loss compared to current state of the art.

Abstract: A reference voltage circuit is provided, which includes bandgap reference circuit, bias current generator, first capacitor, second capacitor, comparator and control logic circuit. In the active mode of the control logic circuit, the control logic circuit controls the bandgap reference circuit to deliver bandgap reference voltage. The comparator transmits first comparison signal to control logic circuit when the first and second capacitors are charged to the bandgap reference voltage. The control logic circuit enters low power mode and controls the bandgap reference circuit to stop delivering the bandgap reference voltage. If the comparator detects the potential difference between the first capacitor and second capacitor exceeds the threshold value, the control logic circuit returns to active mode according to the second comparison signal transmitted form the comparator.

Abstract: Illustrated are a switched-capacitor DC-DC convertor and a control method thereof. The switched-capacitor DC-DC convertor includes a switched-capacitor circuit, a latched comparator and a clock generating module. The switched-capacitor circuit converts an input voltage into an output voltage through a phase switching operation. The latched comparator receives a clock signal, and compares the output voltage and a reference voltage according to the clock signal, to generate the control signal, which triggers a phase switching operation of the switched-capacitor circuit. The clock generating module generates the clock signal, and adjusts a frequency of the clock signal according to variation of the control signal.