Patents by Inventor Wei-Che Kao

Wei-Che Kao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240120334
    Abstract: A method for forming a semiconductor device structure is provided. The method includes forming an isolation layer over a substrate. The method includes forming a spacer layer over the first fin, the second fin, and the isolation layer. The method includes forming a gate dielectric layer in the first trench and covering the first fin, the second fin, and the isolation layer exposed by the first trench. The method includes partially removing the gate dielectric layer to form a second trench in the gate dielectric layer and between the first fin and the second fin. The method includes forming a gate electrode in the first trench of the spacer layer and over the gate dielectric layer.
    Type: Application
    Filed: February 9, 2023
    Publication date: April 11, 2024
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Wei-Chih KAO, Hsin-Che CHIANG, Jeng-Ya YEH
  • Patent number: 11923194
    Abstract: A semiconductor device includes a semiconductor substrate having a first lattice constant, a dopant blocking layer disposed over the semiconductor substrate, the dopant blocking layer having a second lattice constant different from the first lattice constant, and a buffer layer disposed over the dopant blocking layer, the buffer layer having a third lattice constant different from the second lattice constant. The semiconductor device also includes a plurality of channel members suspended over the buffer layer, an epitaxial feature abutting the channel members, and a gate structure wrapping each of the channel members.
    Type: Grant
    Filed: April 25, 2022
    Date of Patent: March 5, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD
    Inventors: Hsin-Che Chiang, Wei-Chih Kao, Chun-Sheng Liang, Kuo-Hua Pan
  • Publication number: 20120088372
    Abstract: A method of forming micro-pore structures or trench structures on a surface of a silicon wafer substrate comprises (A) forming at least a noble-metal alloy particle on the surface of the silicon wafer substrate; and (B) then followed by employing a chemical wet etching on the surface of the silicon wafer substrate. During the processes, noble-metal alloy particle is used to catalyze the oxidation of the silicon wafer substrate surface in contact therewith, and an etchant is used to simultaneous etch the silicon dioxide to result in local micro-etching at the surface of the silicon wafer substrate, thereby forming micro-pore structures or trench structures on the surface of the silicon wafer substrate. The method increases the power conversion efficiency of the solar cells and reduces the manufacturing costs so as to increase the production benefits of the solar cells.
    Type: Application
    Filed: September 9, 2011
    Publication date: April 12, 2012
    Inventors: RAY CHIEN, YU-MEI LIN, WEI-CHE KAO, YI-LING CHIANG
  • Patent number: 8059335
    Abstract: An adjustable optical signal delay module which adjusts power of an amplified spontaneous emission generated by a semiconductor optical amplifier and feeds the adjusted amplified spontaneous emission back to the semiconductor optical amplifier in a direction opposite to an optical signal being amplified by the semiconductor optical amplifier is provided. The feedback of the adjusted amplified spontaneous emission varies a group refractive index of the semiconductor optical amplifier and delays the transmission of an optical signal through the semiconductor optical amplifier. By that arrangement, the adjustable optical delay module obviates the need for the pump laser conventionally required by a coherent population oscillation mechanism. The feedback optical loop includes a variable optical attenuator, an optical filter, and optical circulators. A user can control the delay timing of optical signals via adjusting optical power in the feedback optical loop.
    Type: Grant
    Filed: December 16, 2008
    Date of Patent: November 15, 2011
    Assignee: National Chiao Tung University
    Inventors: Jye hong Chen, Wei-Che Kao, Peng-Chun Peng, Chun-Ting Lin, Fang Ming Wu, Po Tsung Shih, Sien Chi
  • Publication number: 20100073763
    Abstract: The present invention relates to an adjustable optical signal delay module, particularly to a module, which adjusts power of an amplified spontaneous emission generated by a semiconductor optical amplifier and reversely feeds the adjusted amplified spontaneous emission back to the semiconductor optical amplifier to vary a group refractive index of the semiconductor optical amplifier and delay the timing of an optical signal, whereby the present invention can replace the pump laser conventionally required by a CPO mechanism. In the present invention, the feedback optical loop comprises a variable optical attenuator, an optical filter, and optical circulators. An user can control the delay timing of optical signals via adjusting optical power in the feedback optical loop. The present invention can decrease the fabrication cost of an optical signal delay module and reduce the volume thereof.
    Type: Application
    Filed: December 16, 2008
    Publication date: March 25, 2010
    Inventors: Jye Hong Chen, Wei-Che Kao, Peng-Chun Peng, Chun-Ting Lin, Fang Ming Wu, Po Tsung Shih, Sien Chi
  • Publication number: 20090231685
    Abstract: The present invention relates to a technique for tuning the transmission time of optical signal, which adopts an optical amplifier with a bending structure for enhancing the tunable time of optical signal. The effect of tunable time of optical signal can be achieved by adjusting the gain of the optical amplifier.
    Type: Application
    Filed: August 11, 2008
    Publication date: September 17, 2009
    Inventors: Jyehong CHEN, Wei-Che Kao, Peng-Chun Peng, Chun-Ting Lin, Po Tsung Shih, Sien Chi