Patents by Inventor Wei-Che Wu
Wei-Che Wu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240339564Abstract: A semiconductor device includes a semiconductor stack; a substrate formed on the semiconductor stack, including a lower surface connected to the semiconductor stack, an upper surface opposite to the lower surface, and a side surface between the lower surface and the upper surface, wherein the side surface includes a mirror area, a first scribing area, and a first crack area, the mirror area is closer to the lower surface than the first scribing area to the lower surface, and the first scribing area is located between the mirror area and the first crack area; an optical structure on the upper surface of the substrate; and a reflective structure on a side surface of the first scribing area and the first crack area, wherein the first scribing area is arranged below the upper surface of the substrate with a distance less than or equal to ΒΌ of a thickness of the substrate.Type: ApplicationFiled: April 3, 2024Publication date: October 10, 2024Inventors: Wei-Che WU, Chih-Hao CHEN, Yu-Ling LIN, Chao-Hsing CHEN, Yong-Yang CHEN
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Patent number: 12107423Abstract: A method and system for supplying power at a voltage selected from a plurality of voltages. Power is initially received at a first voltage. Embodiments communicate with an AC adapter to get device identification and see if the AC adapter supports other voltages. If so, embodiments communicate with the AC adapter to get more information about the adapter and identify what voltages the adapter is capable of providing. If one of the voltages would allow an information handling system to operate more efficiently, embodiments negotiate a power supply contract to operate at a second voltage. When the information handling system powers down, the system resets to operation at the initial voltage.Type: GrantFiled: April 28, 2022Date of Patent: October 1, 2024Assignee: Dell Products L.P.Inventors: Wei-Cheng Yu, Merle Jackson Wood, Tsung-Cheng Liao, Chin-Jui Liu, Andrew Thomas Sultenfuss, Chi Che Wu
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Publication number: 20240312492Abstract: An integrated circuit (IC) device includes a plurality of memory segments. Each memory segment includes a plurality of memory cells, and a local bit line electrically coupled to the plurality of memory cells and arranged on a first side of the IC device. The IC device further includes a global bit line electrically coupled to the plurality of memory segments, and arranged on a second side of the IC device. The second side is opposite the first side in a thickness direction of the IC device.Type: ApplicationFiled: August 8, 2023Publication date: September 19, 2024Inventors: Yen Lin CHUNG, Kao-Cheng LIN, Wei-Cheng WU, Pei-Yuan LI, Chien-Chen LIN, Chun-Tse CHOU, Chien Hui HUANG, Yung-Ning TU, Shang Lin WU, Chia-Che CHUNG, Chia-Chi HUNG, Wei Min CHAN, Yen-Huei CHEN
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Publication number: 20240283128Abstract: An antenna module includes a substrate and an antenna structure. The antenna structure is disposed on the substrate and includes a radiating portion, a feeding portion, a ground plane, and an impedance adjustment portion. The feeding portion is coupled to the radiating portion and the ground plane. The impedance adjustment portion has a connection end portion and a ground end portion opposite to each other. The connection end portion is connected to the radiating portion. The impedance adjustment portion is bent relative to the radiating portion to extend from the connection end portion toward the feeding portion along an extending direction. The ground end portion is connected to the ground plane and near the feeding portion. In addition, an electronic device including the antenna module is also provided.Type: ApplicationFiled: February 1, 2024Publication date: August 22, 2024Applicant: COMPAL ELECTRONICS, INC.Inventors: Liang-Che Chou, Wei-Sen Teng, Yu-Chun Hsieh, Guan-Ruei Wu, Jui-Hung Lai
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Publication number: 20240264654Abstract: An information handling system detects an initial insertion of an alternating current (AC) adapter, and determines an identifier associated with the AC adapter. The system may also determine a parameter for attenuating noise generated by the AC adapter based on the identifier, and attenuate the noise generated by the AC adapter by applying the parameter.Type: ApplicationFiled: February 6, 2023Publication date: August 8, 2024Inventors: Chi-Che Wu, Wei-Cheng Yu, Geroncio Ong Tan, Tsung-Cheng Liao, Henry Chang
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Publication number: 20240250210Abstract: A light-emitting device includes a substrate comprising an upper surface, a plurality of side surfaces, and a semiconductor stack located on the upper surface. The substrate includes a hexagonal crystal structure. The plurality of side surfaces includes a first side surface. The first side surface is tilted away from a m-plane of the hexagonal crystal structure, and an acute angle is formed between the first side surface and the m-plane. The first side surface includes a first modified stripe, and the first modified stripe includes a plurality of first modified regions. A pitch is between the adjacent first modified regions, and the pitch is not less than 5 ?m. The first side surface comprises a folded structure.Type: ApplicationFiled: January 18, 2024Publication date: July 25, 2024Inventors: Chia-Che LIAO, Chih-Hao CHEN, Wei-Che WU, Sheng-Hao WU, Siou-Huei YANG
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Publication number: 20240162382Abstract: The present disclosure provides a light-emitting package. The light-emitting package includes a main body, a cavity disposed in the cavity, a base plane in the cavity and a light-emitting element. The light-emitting element is disposed in the cavity and connected to the base plane. The light-emitting element includes a substrate and a semiconductor stack on the substrate. The substrate includes a side wall, and the side wall incudes a first cutting trace. The main body includes a step portion disposed in the cavity and it surrounds the light-emitting element. The step portion comprises a first height relative to base plane, and the first cutting trace comprises a second height relative to the base plane. The second height is greater than the first height.Type: ApplicationFiled: November 10, 2023Publication date: May 16, 2024Inventors: Wu-Tsung LO, Chih-Hao CHEN, Wei-Che WU, Heng-Ying CHO, Tsun-Kai KO
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Publication number: 20210111310Abstract: A light emitting chip and associated package structure are provided. The light emitting chip includes a substrate, a first type layer, an active layer, a second type layer, a first type electrode and a second type electrode. A second portion of the first type layer is located over the substrate. A first portion of the first type layer is located over the second portion of the first type layer. The active layer is located over the first portion of the first type layer. The second type layer is located over the active layer. The first type electrode is contacted with a top surface and a sidewall of the second portion of the first type layer and contacted with a portion of a sidewall of the substrate. The second type electrode is contacted with the second type layer.Type: ApplicationFiled: November 30, 2020Publication date: April 15, 2021Inventors: Chang-Da TSAI, Wei-Che WU, Kuan-Kai HUANG
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Publication number: 20190355888Abstract: A light emitting chip and associated package structure are provided. The light emitting chip includes a substrate, a first type layer, an active layer, a second type layer, a first type electrode and a second type electrode. A second portion of the first type layer is located over the substrate. A first portion of the first type layer is located over the second portion of the first type layer. The active layer is located over the first portion of the first type layer. The second type layer is located over the active layer. The first type electrode is contacted with a sidewall of the second portion of the first type layer and contacted with a sidewall of the substrate. The second type electrode is contacted with the second type layer.Type: ApplicationFiled: December 17, 2018Publication date: November 21, 2019Inventors: Chang-Da TSAI, Wei-Che WU, Kuan-Kai HUANG
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Patent number: 8592234Abstract: A light emitting diode comprises a permanent substrate having a chip holding space formed on a first surface of the permanent substrate; an insulating layer and a metal layer sequentially formed on the first surface of the permanent substrate and the chip holding space, wherein the metal layer comprises a first area and a second area not being contacted to each other; a chip having a first surface attached on a bottom of the chip holding space, contacted to the first area of the metal layer; a filler structure filled between the chip holding space and the chip; and a first electrode formed on a second surface of the chip. The chip comprises a light-emitting region and an electrical connection between the first area of the metal layer and the light emitting region is realized by using a chip-bonding technology.Type: GrantFiled: August 27, 2012Date of Patent: November 26, 2013Assignee: Opto Tech CorporationInventors: Chang-Da Tsai, Wei-Che Wu, Chia-Liang Hsu, Ching-Shih Ma
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Publication number: 20120322180Abstract: A light emitting diode comprises a permanent substrate having a chip holding space formed on a first surface of the permanent substrate; an insulating layer and a metal layer sequentially formed on the first surface of the permanent substrate and the chip holding space, wherein the metal layer comprises a first area and a second area not being contacted to each other; a chip having a first surface attached on a bottom of the chip holding space, contacted to the first area of the metal layer; a filler structure filled between the chip holding space and the chip; and a first electrode formed on a second surface of the chip. The chip comprises a light-emitting region and an electrical connection between the first area of the metal layer and the light emitting region is realized by using a chip-bonding technology.Type: ApplicationFiled: August 27, 2012Publication date: December 20, 2012Applicant: OPTO TECH CORPORATIONInventors: Chang-Da Tsai, Wei-Che Wu, Chia-Liang Hsu, Ching-Shih Ma
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Patent number: 8283683Abstract: A light emitting diode chip includes a permanent substrate having a holding space formed on the permanent substrate; an insulating layer and a metal layer sequentially formed on the permanent substrate and the holding spacer; a die having a eutectic layer and a light-emitting region and bonded to the metal layer within the holding space via the eutectic layer coupling to the metal layer; a filler structure filled between the holding space and the die; and an electrode formed on the die and in contact with the light-emitting region.Type: GrantFiled: December 1, 2009Date of Patent: October 9, 2012Assignee: Opto Tech CorporationInventors: Chang-Da Tsai, Wei-Che Wu, Chia-Liang Hsu, Ching-Shih Ma
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Publication number: 20100072497Abstract: A light emitting diode chip includes a permanent substrate having a holding space formed on the permanent substrate; an insulating layer and a metal layer sequentially formed on the permanent substrate and the holding spacer; a die having a eutectic layer and a light-emitting region and bonded to the metal layer within the holding space via the eutectic layer coupling to the metal layer; a filler structure filled between the holding space and the die; and an electrode formed on the die and in contact with the light-emitting region.Type: ApplicationFiled: December 1, 2009Publication date: March 25, 2010Applicant: OPTO TECH CORPORATIONInventors: Chang-Da Tsai, Wei-Che Wu, Chia-Liang Hsu, Ching-Shih Ma
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Publication number: 20080105863Abstract: A light emitting diode comprises a permanent substrate having a chip holding space formed on a first surface of the permanent substrate; an insulating layer and a metal layer sequentially formed on the first surface of the permanent substrate and the chip holding space, wherein the metal layer further comprises a first area and a second area not being contacted to each other; a chip having a first surface attached on a bottom of the chip holding space, contacted to the first area of the metal layer but not contacted to the second area of the metal layer; a filler structure filled between the chip holding space and the chip; and a first electrode formed on a second surface of the chip. The chip comprises a light-emitting region and an electrical connection between the first area of the metal layer and the light emitting region is realized by using a chip-bonding technology.Type: ApplicationFiled: May 15, 2007Publication date: May 8, 2008Applicant: OPTO TECH CORPORATIONInventors: Chang-Da Tsai, Wei-Che Wu, Chia-Liang Hsu