Patents by Inventor Wei-Cheng Lien
Wei-Cheng Lien has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240069431Abstract: In a method of manufacturing an attenuated phase shift mask, a photo resist pattern is formed over a mask blank. The mask blank includes a transparent substrate, an etch stop layer on the transparent substrate, a phase shift material layer on the etch stop layer, a hard mask layer on the phase shift material layer and an intermediate layer on the hard mask layer. The intermediate layer is patterned by using the photo resist pattern as an etching mask, the hard mask layer is patterned by using the patterned intermediate layer as an etching mask, and the phase shift material layer is patterned by using the patterned hard mask layer as an etching mask. The intermediate layer includes at least one of a transition metal, a transition metal alloy, or a silicon containing material, and the hard mask layer is made of a different material than the intermediate layer.Type: ApplicationFiled: February 16, 2023Publication date: February 29, 2024Inventors: Wei-Che HSIEH, Chien-Cheng Chen, Ping-Hsun Lin, Ta-Cheng Lien, Hsin-Chang Lee
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Publication number: 20200360969Abstract: A coffee bean sorting system has a feeding mechanism, a rotary disk, at least one image capture device, an information processing device, and a removal mechanism. The rotary disk can receive coffee beans transported from the feeding mechanism, and can rotate along an axis thereof, such that the coffee beans are spaced apart from each other and form a succession. The image capture device can capture an initial image of each of the coffee beans. The information processing device can perform machine learning training or deep learning training function, identify each of the initial images, and after determining a coffee bean is non-conforming, make the removal mechanism to remove the non-conforming coffee bean.Type: ApplicationFiled: May 14, 2020Publication date: November 19, 2020Applicant: AVITONE CO., LTD.Inventors: WEI-CHENG LIEN, Yu-Shao Chiu, Chuang-Ming Chiu
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Patent number: 9766286Abstract: A method for diagnosing a defect is provided. A first candidate pair comprises a first defect candidate and a second defect candidate. A first pattern is generated to distinguish one or more faults of the first defect candidate from one or more faults of the second defect candidate. The first defect candidate is removed responsive to determining that the first pattern does not detect the first defect candidate and determining that an automatic test equipment (ATE) failure log associates the first pattern with failure. Removing the first candidate pair, as well as additional candidate pairs when possible, promotes diagnosis efficiency by reducing a number of computations required.Type: GrantFiled: August 20, 2014Date of Patent: September 19, 2017Assignee: Taiwan Semiconductor Manufacturing Company LimitedInventors: Kuen-Jong Lee, Cheng-Hung Wu, Wei-Cheng Lien, Hui-Ling Lin, Yen-Ling Liu, Ji-Jan Chen
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Patent number: 9704595Abstract: Techniques are provided for non-volatile storage self-detecting that a heating event has occurred to the non-volatile storage. One example of the heating event is an Infrared (IR) reflow process. In one aspect, a block of memory cells in a memory device are put through a number of program/erase cycles. A group of the memory cells in the cycled block are programmed to a reference threshold voltage distribution. Some time may pass after programming the cycled block. The memory device self-detects that there has been a heating event in response to a shift in the reference VT distribution being more than an allowed amount. The memory device may switch from a first programming mode to a second programming mode in response to detecting that the heating event has occurred.Type: GrantFiled: March 31, 2016Date of Patent: July 11, 2017Assignee: SanDisk Technologies LLCInventors: Alon Eyal, Idan Alrod, Eran Sharon, Ishai Ilani, Mark Murin, David Rozman, Wei-Cheng Lien, Deepanshu Dutta, Changyuan Chen
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Publication number: 20160055631Abstract: A method for diagnosing a defect is provided. A first candidate pair comprises a first defect candidate and a second defect candidate. A first pattern is generated to distinguish one or more faults of the first defect candidate from one or more faults of the second defect candidate. The first defect candidate is removed responsive to determining that the first pattern does not detect the first defect candidate and determining that an automatic test equipment (ATE) failure log associates the first pattern with failure. Removing the first candidate pair, as well as additional candidate pairs when possible, promotes diagnosis efficiency by reducing a number of computations required.Type: ApplicationFiled: August 20, 2014Publication date: February 25, 2016Inventors: Kuen-Jong Lee, Cheng-Hung Wu, Wei-Cheng Lien, Hui-Ling Lin, Yen-Ling Liu, Ji-Jan Chen
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Patent number: 8263432Abstract: A material composition having a core-shell microstructure suitable for manufacturing a varistor having outstanding electrical properties, the core-shell microstructure of the material composition at least comprising a cored-structure made of a conductive or semi-conductive material and a shelled-structure made from a glass material to wrap the cored-structure, and electrical properties of the varistors during low temperature of sintering process can be decided and designated by precisely controlling the size of the grain of the cored-structure and the thickness and insulation resistance of the insulating layer of the shelled-structure of material composition.Type: GrantFiled: May 17, 2007Date of Patent: September 11, 2012Assignee: Bee Fund Biotechnology Inc.Inventors: Ching-Hohn Lien, Cheng-Tsung Kuo, Jun-Nan Lin, Jie-An Zhu, Li-Yun Zhang, Wei-Cheng Lien
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Patent number: 7724124Abstract: A low-capacitance multilayer chip varistor has capacitance lower than 0.5 pF at 1 MHz and has a characteristic of resisting more than thousands of times of 8 KV electrostatic shock, which comprises a ceramic main body, outer electrodes disposed at two ends of the ceramic main body and inner electrodes disposed therein; the ceramic main body comprises inorganic glass of 3˜50 wt % and semi-conductive or conductive particles of 50˜97 wt % with particle size of more than 0.1 ?m, and a layer of inorganic glass film covers the surface of semi-conductive or conductive particles, wherein the inorganic glass film contains semi-conductive or conductive particles of submicron or nanometer which is smaller than 1 micron, and the quantity contained of semi-conductive or conductive particles is less than 20 wt % of that of inorganic glass.Type: GrantFiled: February 12, 2007Date of Patent: May 25, 2010Assignee: SFI Electronics Technology Inc.Inventors: Ching-Hohn Lien, Cheng-Tsung Kuo, Jun-Nun Lin, Jie-An Zhu, Li-Yun Zhang, Xing-Guang Huang, Wei-Cheng Lien
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Patent number: 7541910Abstract: A multilayer zinc oxide varistor without bismuth oxide system ingredients, and having variable breakdown voltages by controlling the thickness of the ceramic material; the varistor is bismuth-free and composed of zinc oxide as the primary constituent with alkaline earth element (Ba) as first additive, at least one of transition elements of Mn, Co, Cr, or Ni as second additives, at least one of rare earth elements of Pr, La, Ce, Nd or Tb as third additives and at least one of B, Si, Se, Al, Ti, W, Sn, Sb, Na, or K as rest additives, and the bismuth-free and zinc oxide based varistor exhibits an excellent ESD (Electro-Static Discharge) withstanding characteristic.Type: GrantFiled: May 25, 2006Date of Patent: June 2, 2009Assignee: SFI Electronics Technology Inc.Inventors: Wei-Cheng Lien, Cheng-Tsung Kuo, Jun-Nun Lin, Jie-An Zhu, Li-Yun Zhang
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Publication number: 20080286898Abstract: A material composition having a core-shell microstructure suitable for manufacturing a varistor having outstanding electrical properties, the core-shell microstructure of the material composition at least comprising a cored-structure made of a conductive or semi-conductive material and a shelled-structure made from a glass material to wrap the cored-structure, and electrical properties of the varistors during low temperature of sintering process can be decided and designated by precisely controlling the size of the grain of the cored-structure and the thickness and insulation resistance of the insulating layer of the shelled-structure of material composition.Type: ApplicationFiled: May 17, 2007Publication date: November 20, 2008Applicant: BEE FUND BIOTECHNOLOGY INC.Inventors: Ching-Hohn Lien, Cheng-Tsung Kuo, Jun Nan Lin, Jie-An Zhu, Li-Yun Zhang, Wei-Cheng Lien
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Publication number: 20080191834Abstract: A low-capacitance multilayer chip varistor has capacitance lower than 0.5 pF at 1 MHz and has a characteristic of resisting more than thousands of times of 8 KV electrostatic shock, which comprises a ceramic main body, outer electrodes disposed at two ends of the ceramic main body and inner electrodes disposed therein; the ceramic main body comprises inorganic glass of 3˜50 wt % and semi-conductive or conductive particles of 50˜97 wt % with particle size of more than 0.1 ?m, and a layer of inorganic glass film covers the surface of semi-conductive or conductive particles, wherein the inorganic glass film contains semi-conductive or conductive particles of submicron or nanometer which is smaller than 1 micron, and the quantity contained of semi-conductive or conductive particles is less than 20 wt % of that of inorganic glass.Type: ApplicationFiled: February 12, 2007Publication date: August 14, 2008Applicant: SFI Electronics Technology Inc.Inventors: Ching-Hohn Lien, Cheng-Tsung Kuo, Jun-Nun Lin, Jie-An Zhu, Li-Yun Zhang, Xing-Guang Huang, Wei-Cheng Lien
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Publication number: 20070273469Abstract: A multilayer zinc oxide varistor without bismuth oxide system ingredients, and having variable breakdown voltages by controlling the thickness of the ceramic material; the varistor is bismuth-free and composed of zinc oxide as the primary constituent with alkaline earth element (Ba) as first additive, at least one of transition elements of Mn, Co, Cr, or Ni as second additives, at least one of rare earth elements of Pr, La, Ce, Nd or Tb as third additives and at least one of B, Si, Se, Al, Ti, W, Sn, Sb, Na, or K as rest additives, and the bismuth-free and zinc oxide based varistor exhibits an excellent ESD (Electro-Static Discharge) withstanding characteristic.Type: ApplicationFiled: May 25, 2006Publication date: November 29, 2007Applicant: SFI Electronics Technology Inc.Inventors: Wei-Cheng Lien, Cheng-Tsung Kuo, Jun-Nun Lin, Jie-An Zhu, Li-Yun Zhang