Patents by Inventor Wei-Cheng PENG

Wei-Cheng PENG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240178214
    Abstract: An integrated circuit includes a horizontal routing track in a first metal layer, and a backside routing track in a backside metal layer. The backside metal layer and the first metal layer are formed at opposite sides of a semiconductor substrate. The horizontal routing track is conductively connected to a first terminal of a first transistor without passing through a routing track in another metal layer. The backside routing track is conductively connected to a second terminal of the first transistor without passing through a routing track in another metal layer. One of the first terminal and the second terminal is a gate terminal of the first transistor while another one the first terminal and the second terminal is either a source terminal or a drain terminal of the first transistor.
    Type: Application
    Filed: February 1, 2024
    Publication date: May 30, 2024
    Inventors: Wei-An LAI, Shih-Wei PENG, Wei-Cheng LIN, Jiann-Tyng TZENG
  • Publication number: 20240178139
    Abstract: Apparatus and methods for generating a physical layout for a high density routing circuit are disclosed. An exemplary semiconductor structure includes: a gate structure; a plurality of first metal lines formed in a first dielectric layer below the gate structure; at least one first via formed in a second dielectric layer between the gate structure and the first dielectric layer; a plurality of second metal lines formed in a third dielectric layer over the gate structure; and at least one second via formed in a fourth dielectric layer between the gate structure and the third dielectric layer. Each of the at least one first via is electrically connected to the gate structure and a corresponding one of the plurality of first metal lines. Each of the at least one second via is electrically connected to the gate structure and a corresponding one of the plurality of second metal lines.
    Type: Application
    Filed: February 8, 2024
    Publication date: May 30, 2024
    Inventors: Wei-An LAI, Shih-Wei PENG, Wei-Cheng LIN, Jiann-Tyng TZENG
  • Publication number: 20240105601
    Abstract: An integrated circuit includes a plurality of first layer deep lines, a plurality of first layer shallow lines, a plurality of second layer deep lines, and a plurality of second layer shallow lines. The integrated circuit also includes a first active device and a second active device coupled between a conducting path that has a low resistivity portion and a low capacitivity portion. The first active device has an output coupled to a first layer deep line that is in the low resistivity portion. The second active device has an input coupled to a first layer shallow line that is in the low capacitivity portion. The low resistivity portion excludes the first layer shallow lines and the second layer shallow lines, and the low capacitivity portion excludes the first layer deep lines and the second layer deep lines.
    Type: Application
    Filed: November 28, 2023
    Publication date: March 28, 2024
    Inventors: Wei-An LAI, Te-Hsin CHIU, Shih-Wei PENG, Wei-Cheng LIN, Jiann-Tyng TZENG, Chia-Tien WU
  • Patent number: 11923297
    Abstract: Apparatus and methods for generating a physical layout for a high density routing circuit are disclosed. An exemplary semiconductor structure includes: a gate structure; a plurality of first metal lines formed in a first dielectric layer below the gate structure; at least one first via formed in a second dielectric layer between the gate structure and the first dielectric layer; a plurality of second metal lines formed in a third dielectric layer over the gate structure; and at least one second via formed in a fourth dielectric layer between the gate structure and the third dielectric layer. Each of the at least one first via is electrically connected to the gate structure and a corresponding one of the plurality of first metal lines. Each of the at least one second via is electrically connected to the gate structure and a corresponding one of the plurality of second metal lines.
    Type: Grant
    Filed: April 27, 2021
    Date of Patent: March 5, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Wei-An Lai, Shih-Wei Peng, Wei-Cheng Lin, Jiann-Tyng Tzeng
  • Patent number: 9425612
    Abstract: An output power protection apparatus includes a DC conversion unit, an output protection unit, a high-voltage battery, a low-voltage battery, and a control unit. The DC conversion unit converts an input DC power into an output DC power. The output protection unit is connected in series to the DC conversion unit, and the output protection unit has a plurality of protection circuits connected in parallel to each other. When a short-circuit condition occurs between the high-voltage battery and the low-voltage battery or the low-voltage battery is reversely connected in polarity, the control unit generates a control signal to control the protection circuits to disconnect the connection between the low-voltage battery and a low-voltage device, and the DC conversion unit.
    Type: Grant
    Filed: July 31, 2014
    Date of Patent: August 23, 2016
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Wen-Sheng Tsao, Chin-Hou Chen, Jui-Teng Chan, Chen-Tung Chang, Chen-Bin Huang, Wei-Cheng Peng
  • Publication number: 20150244167
    Abstract: An output power protection apparatus includes a DC conversion unit, an output protection unit, a high-voltage battery, a low-voltage battery, and a control unit. The DC conversion unit converts an input DC power into an output DC power. The output protection unit is connected in series to the DC conversion unit, and the output protection unit has a plurality of protection circuits connected in parallel to each other. When a short-circuit condition occurs between the high-voltage battery and the low-voltage battery or the low-voltage battery is reversely connected in polarity, the control unit generates a control signal to control the protection circuits to disconnect the connection between the low-voltage battery and a low-voltage device, and the DC conversion unit.
    Type: Application
    Filed: July 31, 2014
    Publication date: August 27, 2015
    Inventors: Wen-Sheng TSAO, Chin-Hou CHEN, Jui-Teng CHAN, Chen-Tung CHANG, Chen-Bin HUANG, Wei-Cheng PENG