Patents by Inventor Wei-Cheng Tang

Wei-Cheng Tang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250215240
    Abstract: A corrosion resistant structure is provided. The corrosion resistant structure includes a steel layer, a metal layer, and an organic layer. The metal layer contains zinc, aluminum, or a combination thereof. The metal layer is disposed on the steel layer. The metal layer is in contact with the steel layer. The metal layer and the steel layer have different compositions. The organic layer is disposed on the metal layer. The organic layer is in contact with the metal layer. The organic layer includes an organic resin, a diol compound containing two aliphatic rings, and an alkali earth metal salt.
    Type: Application
    Filed: May 16, 2024
    Publication date: July 3, 2025
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Hsiu-Pang YEH, Wei-Cheng TANG, Shu-Yun CHIEN, Hui-Chu HUANG
  • Publication number: 20250205387
    Abstract: The present disclosure relates to medical implant components comprising a biocompatible-bioactive composite material layer (BACL), methods of making the medical implant components and applications of the medical implant components.
    Type: Application
    Filed: December 23, 2024
    Publication date: June 26, 2025
    Applicant: INNOJET TECHNOLOGY CO., LTD.
    Inventors: JEN-HSIEN CHANG, WEI-CHENG TANG, YANG-SHENG HUANG, YU-YEN TSAI
  • Publication number: 20250171643
    Abstract: A polymer and a coating material are provided. The polymer is formed by polymerizing a plurality of monomers. The monomers include a first monomer, a second monomer, and a third monomer. The first monomer is itaconic acid. The second monomer is C1-4 alkyl methacrylate, styrene, isobornyl acrylate, di(C2-4 alkyl) itaconate, or a combination thereof. The third monomer is 2-octylacrylate, C9-12 alkyl acrylate, or a combination thereof. The coating material includes the polymer.
    Type: Application
    Filed: October 11, 2024
    Publication date: May 29, 2025
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Shu-Ling YEH, Su-Mei CHEN WEI, Chien-Chen CHU, Wei-Cheng TANG, Yi-Che SU
  • Publication number: 20240424164
    Abstract: The present disclosure relates to medical implant components comprising a biocompatible protective coating layer (BPCL) and a process of making the BPCL and medical implant components.
    Type: Application
    Filed: May 2, 2024
    Publication date: December 26, 2024
    Applicant: INNOJET TECHNOLOGY CO., LTD.
    Inventors: Jen-Hsien CHANG, Wei-Cheng TANG, Yu-Yen TSAI
  • Publication number: 20240400746
    Abstract: A polyurethane and a preparation method thereof are provided. The polyurethane is represented by Formula 1. The preparation method of the polyurethane includes performing an addition reaction between a polyester-polyether polyol represented by the Formula 4 and a di-isocyanate. The formed polyurethane has high elasticity and high moisture-permeable properties.
    Type: Application
    Filed: December 21, 2023
    Publication date: December 5, 2024
    Applicant: Industrial Technology Research Institute
    Inventors: Ying-Chen Liao, De-Lun Kuo, Hsu-Tzu Fan, Wei-Cheng Tang, Cheng-Jyun Huang, Shin-Liang Kuo
  • Publication number: 20230384813
    Abstract: A low-dropout regulator circuit includes a reference circuit, an amplifying circuit, a power switch circuit, a feedback circuit, and a control circuit. The reference circuit is configured to generate a reference voltage. The amplifying circuit is configured to generate an amplifying voltage according to the reference voltage and a feedback voltage. The power switch circuit is configured to receive the amplifying voltage and generate an output voltage at an output terminal according to an input voltage. The feedback circuit is configured to generate the feedback voltage according to the output voltage. The control circuit is configured to control the power switch circuit according to the input voltage and a signal from the reference circuit.
    Type: Application
    Filed: May 11, 2023
    Publication date: November 30, 2023
    Inventors: Sheng-Wei LIN, Wei-Cheng TANG
  • Patent number: 11722816
    Abstract: A signal processing circuit includes an input buffer circuit and a direct-(DC) voltage detector circuit. The input buffer circuit is coupled to a pin. The pin is configured to receive an input signal. The DC voltage detector circuit is coupled to the pin and the input buffer circuit. The DC voltage detector circuit is configured to detect the input signal to generate a mode signal and generate a bias of the input buffer circuit according to the mode signal.
    Type: Grant
    Filed: November 15, 2021
    Date of Patent: August 8, 2023
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Wei-Cheng Tang, Chia-Ling Chang
  • Patent number: 11693474
    Abstract: The present invention provides a circuitry applied to multiple power domains. An amplifier of the circuitry includes an output stage and a switching circuit. The output stage includes a first transistor and a second transistor, wherein the first transistor is coupled between a supply voltage and an output terminal, the second transistor is coupled between the output terminal and a ground voltage. The switching circuit is configured to choose a body of the first transistor from the supply voltage or a reference voltage.
    Type: Grant
    Filed: May 25, 2021
    Date of Patent: July 4, 2023
    Assignee: Realtek Semiconductor Corp.
    Inventors: Wei-Cheng Tang, Li-Lung Kao, Chia-Ling Chang, Sheng-Wei Lin, Sheng-Tsung Wang
  • Patent number: 11618822
    Abstract: An organic-inorganic hybrid resin is formed by reacting a polyol organic resin with a polysilsesquioxane polymer. The organic-inorganic hybrid resin has T0, T1, T2, and T3 signals of 29Si-NMR, wherein a ratio of the sum of 3 times the integral value of T0 signal and 2 times the integral value of T1 signal and the integral value of T2 signal and the integral value of T3 signal ((3T0+2T1+T2)/T3) is from 0.3 to 1.2, wherein the T0 signal range is 35 ppm to 40 ppm, the T1 signal range is 48 ppm to 53 ppm, the T2 signal range is 55 ppm to 62 ppm, and the T3 signal range is 63 ppm to 72 ppm.
    Type: Grant
    Filed: December 30, 2020
    Date of Patent: April 4, 2023
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Yuan-Chang Huang, Shu-Yun Chien, Ya-Tin Yu, Wei-Cheng Tang
  • Patent number: 11611317
    Abstract: The present invention provides a circuitry applied to multiple power domains, wherein the circuitry includes a first circuit block and second circuit block, the first circuit block is powered by a first supply voltage of a first power domain, and the second circuit block is powered by a second supply voltage of a second power domain. The first circuit block includes a first amplifier and a switching circuit. The first amplifier is configured to receive an input signal to generate a processed input signal. When the second circuit block is powered by the second supply voltage, the switching circuit is configured to forward the processed input signal to the second circuit block; and when the second circuit block is not powered by the second supply voltage, the switching circuit disconnects a path between the first amplifier and the second circuit block.
    Type: Grant
    Filed: May 31, 2021
    Date of Patent: March 21, 2023
    Assignee: Realtek Semiconductor Corp.
    Inventors: Wei-Cheng Tang, Li-Lung Kao, Chia-Ling Chang, Sheng-Tsung Wang, Sheng-Wei Lin
  • Publication number: 20220321085
    Abstract: A signal processing circuit includes an input buffer circuit and a direct-(DC) voltage detector circuit. The input buffer circuit is coupled to a pin. The pin is configured to receive an input signal. The DC voltage detector circuit is coupled to the pin and the input buffer circuit. The DC voltage detector circuit is configured to detect the input signal to generate a mode signal and generate a bias of the input buffer circuit according to the mode signal.
    Type: Application
    Filed: November 15, 2021
    Publication date: October 6, 2022
    Inventors: Wei-Cheng TANG, Chia-Ling CHANG
  • Patent number: 11424746
    Abstract: A reference-less dock and data recovery device includes a CDR circuit, an oscillator circuit, and a processor. The CDR circuit is configured to generate a first clock signal through synchronization according to a data signal having a first frequency in a first time period. The oscillator circuit is configured to output an oscillating clock signal according to the first clock signal, A frequency of the oscillating clock signal is substantially identical to that of the first clock signal. The processor oversamples the data signal having a second frequency in a second time period to generate a simulated preparation signal conforming to the second frequency. The CDR circuit is configured to generate a second clock signal through synchronization according to the simulated preparation signal. Before generating the second clock signal, the CDR circuit is synchronized to the oscillating clock signal to maintain outputting of the first clock signal.
    Type: Grant
    Filed: May 27, 2021
    Date of Patent: August 23, 2022
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Hsiu-Ming Chuang, Wei-Cheng Tang, Li-Lung Kao
  • Publication number: 20220247414
    Abstract: A reference-less clock and data recovery device includes a CDR circuit, an oscillator circuit, and a processor. The CDR circuit is configured to generate a first clock signal through synchronization according to a data signal having a first frequency in a first time period. The oscillator circuit is configured to output an oscillating clock signal according to the first clock signal. A frequency of the oscillating clock signal is substantially identical to that of the first clock signal. The processor oversamples the data signal having a second frequency in a second time period to generate a simulated preparation signal conforming to the second frequency. The CDR circuit is configured to generate a second clock signal through synchronization according to the simulated preparation signal. Before generating the second clock signal, the CDR circuit is synchronized to the oscillating clock signal to maintain outputting of the first clock signal.
    Type: Application
    Filed: May 27, 2021
    Publication date: August 4, 2022
    Applicant: REALTEK SEMICONDUCTOR CORP.
    Inventors: Hsiu-Ming CHUANG, Wei-Cheng TANG, Li-Lung KAO
  • Publication number: 20220216085
    Abstract: An electrostatic chuck is provided, the electrostatic chuck includes a base; and an insulating layer, an electrode layer, a first dielectric layer, and a second dielectric layer sequentially stacked on the base. The first dielectric layer is aluminum oxide (Al2O3) or aluminum nitride (AlN). A material of the second dielectric layer is different from a material of the first dielectric layer, and the second dielectric layer includes titanium element, IVA group element, and oxygen element.
    Type: Application
    Filed: July 23, 2021
    Publication date: July 7, 2022
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Yung-Hsiang HUANG, Wei-Cheng TANG, Yi-Che SU, Wen-Pin CHUANG, Su-Mei CHEN WEI, Ya-Tin YU, Yun-Shan HUANG
  • Publication number: 20220177702
    Abstract: An organic-inorganic hybrid resin is formed by reacting a polyol organic resin with a polysilsesquioxane polymer. The organic-inorganic hybrid resin has T0, T1, T2, and T3 signals of 29Si-NMR, wherein a ratio of the sum of 3 times the integral value of T0 signal and 2 times the integral value of T1 signal and the integral value of T2 signal and the integral value of T3 signal ((3T0+2T1+T2)/T3) is from 0.3 to 1.2, wherein the T0 signal range is 35 ppm to 40 ppm, the T1 signal range is 48 ppm to 53 ppm, the T2 signal range is 55 ppm to 62 ppm, and the T3 signal range is 63 ppm to 72 ppm.
    Type: Application
    Filed: December 30, 2020
    Publication date: June 9, 2022
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Yuan-Chang HUANG, Shu-Yun CHIEN, Ya-Tin YU, Wei-Cheng TANG
  • Publication number: 20220026979
    Abstract: The present invention provides a circuitry applied to multiple power domains. An amplifier of the circuitry includes an output stage and a switching circuit. The output stage includes a first transistor and a second transistor, wherein the first transistor is coupled between a supply voltage and an output terminal, the second transistor is coupled between the output terminal and a ground voltage. The switching circuit is configured to choose a body of the first transistor from the supply voltage or a reference voltage.
    Type: Application
    Filed: May 25, 2021
    Publication date: January 27, 2022
    Inventors: Wei-Cheng Tang, Li-Lung Kao, Chia-Ling Chang, Sheng-Wei Lin, Sheng-Tsung Wang
  • Publication number: 20210399693
    Abstract: The present invention provides a circuitry applied to multiple power domains, wherein the circuitry includes a first circuit block and second circuit block, the first circuit block is powered by a first supply voltage of a first power domain, and the second circuit block is powered by a second supply voltage of a second power domain. The first circuit block includes a first amplifier and a switching circuit. The first amplifier is configured to receive an input signal to generate a processed input signal. When the second circuit block is powered by the second supply voltage, the switching circuit is configured to forward the processed input signal to the second circuit block; and when the second circuit block is not powered by the second supply voltage, the switching circuit disconnects a path between the first amplifier and the second circuit block.
    Type: Application
    Filed: May 31, 2021
    Publication date: December 23, 2021
    Inventors: Wei-Cheng Tang, Li-Lung Kao, Chia-Ling Chang, Sheng-Tsung Wang, Sheng-Wei Lin
  • Publication number: 20210198522
    Abstract: A method for manufacturing a water-based coating material is provided, including: (a) reacting tetraalkoxysilane, acidic aqueous solution of vanadium salt, and trialkoxyalkylsilane to form an oligomer; (b) reacting the oligomer with colloidal silica particles to form a modified oligomer; and (c) reacting the modified oligomer with trialkoxyepoxysilane to obtain a water-based coating material.
    Type: Application
    Filed: December 31, 2019
    Publication date: July 1, 2021
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Kai-Wei LIAO, Wei-Cheng TANG, Ya-Tin YU, Yun-Shan HUANG, Yeu-Kuen WEI, Cheng-Yang TSAI, Yi-Che SU
  • Publication number: 20210198179
    Abstract: A compound serving as coalescing agent and a coating composition employing the compound are provided. The compound has a structure represented by Formula (I) wherein n is 0, 1, 2, or 3; m is 0, 1, 2, or 3; R1 is R2 is R3, R4, R5, and R6 are independently C1-12 alkyl group; and, R1 is distinct from R2 when n is equal to m.
    Type: Application
    Filed: December 30, 2019
    Publication date: July 1, 2021
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Ya-I HSU, Yuan-Chang HUANG, Yi-Che SU, Wei-Cheng TANG
  • Patent number: 11004486
    Abstract: The present disclosure relates to a driving circuit including a first circuit, a transistor switch, and a voltage level conversion circuit. The first circuit includes an operational amplifier and a feedback circuit, and is configured to output a first signal (e.g., an analog signal). The feedback circuit is configured to feed back the first signal to the operational amplifier. A source terminal and a drain terminal of the transistor switch are respectively electrically coupled to the operational amplifier and an output pin of the driving circuit. The voltage level conversion circuit is connected to the source terminal and a gate terminal of the transistor switch. When the voltage level conversion circuit is enabled, a voltage difference between the gate terminal and the source terminal of the transistor switch is controlled to a set value, so that the first signal is output to the output pin through the transistor switch.
    Type: Grant
    Filed: July 16, 2019
    Date of Patent: May 11, 2021
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Chia-Ling Chang, Wei-Cheng Tang, Li-Lung Kao, Che-Hung Lin