Abstract: An optical lens assembly includes, from an object side to an image side, at least four optical lens elements. At least one of the at least four optical lens elements includes an anti-reflective coating. The at least one optical lens element including the anti-reflective coating is made of a plastic material. The anti-reflective coating is arranged on an object-side surface or an image-side surface of the at least one optical lens element including the anti-reflective coating. The anti-reflective coating includes at least one coating layer. One of the at least one coating layer at the outer of the anti-reflective coating is made of ceramics. The anti-reflective coating includes a plurality of holes, and sizes of the plurality of holes adjacent to the outer of the anti-reflective coating are larger than sizes of the plurality of holes adjacent to the inner of the anti-reflective coating.

Abstract: A core of a dual-motor-driven inflatable pump has a base, a cylinder, two electric motors, and a drive wheel set. The base has an assembly portion, a fixing portion, and a receiving space formed between the assembly portion and the fixing portion. The cylinder is disposed on the base and has a cylinder body, a cylinder head, and a piston rod. The cylinder body is disposed on the fixing portion via the cylinder head. The piston rod is disposed in the cylinder body and extends in the receiving space via the fixing portion. The two electric motors are disposed on the assembly portion of the base, and each has a drive shaft extended in the receiving space. The drive wheel set is disposed in the receiving space of the base and has a driven gear and two drive gears engaging with the driven gear.

Abstract: A time division duplexed (TDD) frequency modulation continuous wave (FMCW) radar system includes P transmitter circuit chains and M receiver circuit chains. The P transmitter circuit chains are used to transmit a plurality of FMCW signals. A pth transmitter circuit chain is coupled to a single pole Op throw (SPQPT) radio frequency (RF) switch, the SPOT RF switch is coupled to Op antennas, Qp and P are positive integers, and p is a positive integer not larger than P. The M receiver circuit chains are used to receive a plurality of reflected FMCW signals. An mth receiver circuit chain is coupled to a single pole Nm throw (SPNmT) radio frequency (RF) switch, the SPNmT RF switch is coupled to Nm antennas, Nm and M are positive integers, and m is a positive integer not larger than M.

Abstract: A semiconductor substrate processing method includes: providing a substrate to be processed, where the substrate to be processed has a side to be processed and a bonding side which are opposite to each other; providing a hole supply substrate; and bonding the hole supply substrate to the bonding side of the substrate to be processed by a wafer bonding process so as to obtain a substrate pair, and performing a material process. By the semiconductor substrate processing method, the purpose of rapid electrochemical etching can be achieved.

Abstract: Provided is an isolated nucleic acid molecule comprising a NKp30 transmembrane domain, and a chimeric antigen receptor comprising the same. The isolated nucleic acid molecule comprising a NKp30 transmembrane domain comprises nucleic acid sequences encoding (a) an extracellular antigen binding domain, comprising a heavy chain variable region; (b) a hinge domain; (c) a NKp30 transmembrane domain; and (d) a NKp30 cytoplasmic domain. By introducing nucleic acid sequences of the NKp30 transmembrane domain and the NKp30 cytoplasmic domain in combination with the extracellular antigen binding domain into a T cell, the resulting CAR-T cell is a multi-chain CAR-T cell with a NKp30 receptor complex. Consequently, the resulting CAR-T cell forms stable immune synapses with cancer cells and exhibits excellent cytotoxicity against cancer cells.

Abstract: In a radar sensor, a transmitting antenna is configured to radiate a transmitted RF signal, a receiving antenna is configured to receive a reflected RF signal from a target, and a frontend circuit is configured to calculate the distance between the target and the radar sensor by measuring the frequency shift between the transmitted RF signal and the reflected RF signal. The frontend circuit includes a crystal-less signal synthesizer configured to generate the transmitted RF signal without using a crystal, and a mixer configured to provide an IF-band signal associated with the frequency shift between the transmitted RF signal and the reflected RF signal by mixing the reflected RF signal and the transmitted RF signal.

Abstract: a combination socket comprises a socket surface that can accommodate multiple different specifications of IEC plugs. This socket surface has recessed grooves, socket cores, and socket holes; the surface of the socket core is equipped with live wire socket holes, neutral wire socket holes, and ground wire socket holes; the grooves include a wide groove located in front of the socket core and a narrow groove located behind the socket core.

Abstract: An optical lens assembly includes, from an object side to an image side, at least four optical lens elements. At least one of the at least four optical lens elements includes an anti-reflective coating. The at least one optical lens element including the anti-reflective coating is made of a plastic material. The anti-reflective coating is arranged on an object-side surface or an image-side surface of the at least one optical lens element including the anti-reflective coating. The anti-reflective coating includes at least one coating layer. One of the at least one coating layer at the outer of the anti-reflective coating is made of ceramics. The anti-reflective coating includes a plurality of holes, and sizes of the plurality of holes adjacent to the outer of the anti-reflective coating are larger than sizes of the plurality of holes adjacent to the inner of the anti-reflective coating.

Abstract: An optical lens assembly includes, from an object side to an image side, at least four optical lens elements. At least one of the at least four optical lens elements includes an anti-reflective coating. The at least one optical lens element including the anti-reflective coating is made of a plastic material. The anti-reflective coating is arranged on an object-side surface or an image-side surface of the at least one optical lens element including the anti-reflective coating. The anti-reflective coating includes at least one coating layer. One of the at least one coating layer at the outer of the anti-reflective coating is made of ceramics. The anti-reflective coating includes a plurality of holes, and sizes of the plurality of holes adjacent to the outer of the anti-reflective coating are larger than sizes of the plurality of holes adjacent to the inner of the anti-reflective coating.

Abstract: The present disclosure discloses a memory signal calibration apparatus and a memory signal calibration method. A gating circuit generates a data strobe enablement setting signal according to a setting control signal, generates an enabling state of the data strobe enablement signal and performs gating on a data strobe signal according to the enabling state to generate a gated data strobe signal.

Abstract: An electrode for a lithium-ion battery is provided, which comprises: a current collector; and an electrode material layer disposed on the current collector, wherein the electrode material layer comprises an anode material and a binder, the binder is pectin, its derivative or a combination thereof, and the anode material is selected from the group consisting of lithium vanadium oxide, lithium titanium oxide, lithium iron oxide, graphite, and a combination thereof. In addition, a lithium-ion battery comprising the aforesaid electrode is also provided.

Abstract: A test method for a delay circuit and a test circuitry are provided. The test circuitry incudes the delay circuit that essentially includes multiple serially connected logic gates, a clock pulse generator at an input end of the delay circuit for generating one or more cycles of clock signals, and a counter at an output end of the delay circuit for counting the clock signals passing through the delay circuit. The test circuitry implements a test mode by switching lines to the clock pulse generator and the counter. The test circuitry relies on a comparison result of a counting result made by the counter and a number of the cycles of the clock signals to test any failure of the delay circuit.

Abstract: A method for fabricating a micro resistance layer and a method for fabricating a micro resistor are provided. The method for fabricating a micro resistance layer includes: providing a substrate; forming a first resistance layer on the substrate by using a screen printing process or a sputtering process; dividing the first resistance layer into second resistance layers, wherein each one of the product regions includes a second resistance layer, and an area of each one of the product regions is smaller than 0.4*0.2 mm2; and trimming the second resistance layer of each one of the product regions according to a predetermined resistance value to enable the pattern of each one of the second resistance layers to correspond to the predetermined resistance value. The method for fabricating a micro resistor uses the method for fabricating a micro resistance layer for fabrication of the micro resistor.

Abstract: A method for performing garbage collection (GC) management of a memory device with aid of dedicated information control and associated apparatus are provided. The method may include: receiving at least one first command, and performing at least one accessing operation on a non-volatile (NV) memory according to the at least one first command; and executing a GC procedure to start performing GC on the NV memory, for example: dividing a memory region of a volatile memory into multiple sub-regions to be multiple dedicated memory regions; selecting multiple source blocks; comparing address mapping tables to generate and store valid-data location information in the multiple dedicated memory regions, respectively; and performing multiple GC operations according to the valid-data location information respectively stored in the multiple dedicated memory regions.

Abstract: A core of a dual-motor-driven inflatable pump has a base, a cylinder, two electric motors, and a drive wheel set. The base has an assembly portion, a fixing portion, and a receiving space formed between the assembly portion and the fixing portion. The cylinder is disposed on the base and has a cylinder body, a cylinder head, and a piston rod. The cylinder body is disposed on the fixing portion via the cylinder head. The piston rod is disposed in the cylinder body and extends in the receiving space via the fixing portion. The two electric motors are disposed on the assembly portion of the base, and each has a drive shaft extended in the receiving space. The drive wheel set is disposed in the receiving space of the base and has a driven gear and two drive gears engaging with the driven gear.

Abstract: A flash memory controller includes a specific buffer and a processor. The specific buffer allocates a cache space. The processor receives a specific host address sent from the host device, reads and loads a corresponding address pointer mapping table from the flash memory into the cache space according to address information pointed by a specific address pointer linker, determines a specific address pointer corresponding to the specific host address from the corresponding address pointer mapping table according to the specific host address, reads and loads a corresponding address mapping table from the flash memory into the cache space according to address information pointed by a specific address pointer corresponding to the specific host address, and finds a specific flash memory address from the corresponding address mapping table according to the specific host address to perform an access operation in response to the found specific flash memory address.