Patents by Inventor Wei-Chi Lo

Wei-Chi Lo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240372821
    Abstract: A network communication apparatus, includes a dispatch device, a first core group with several parallel core units and a second core group with at least one serial core unit. The dispatch device receives several packets contained in several first packet flows, and configured to dispatch several meta data to the parallel core units through several first data flows, and the meta data contain tunnel parameters of the packets. Furthermore, the at least one serial core unit receives the meta data from the parallel core units through several second data flows.
    Type: Application
    Filed: April 22, 2024
    Publication date: November 7, 2024
    Inventors: Ling-Yuan CHEN, Wei-Han KUO, Sheng-Wen HSU, Chung-Chi LO
  • Publication number: 20240355663
    Abstract: A method for cleaning debris and contamination from an etching apparatus is provided. The etching apparatus includes a process chamber, a source of radio frequency power, an electrostatic chuck within the process chamber, a chuck electrode, and a source of DC power connected to the chuck electrode. The method of cleaning includes placing a substrate on a surface of the electrostatic chuck, applying a plasma to the substrate, thereby creating a positively charged surface on the surface of the substrate, applying a negative voltage or a radio frequency pulse to the electrode chuck, thereby making debris particles and/or contaminants from the surface of the electrostatic chuck negatively charged and causing them to attach to the positively charged surface of the substrate, and removing the substrate from the etching apparatus thereby removing the debris particles and/or contaminants from the etching apparatus.
    Type: Application
    Filed: June 28, 2024
    Publication date: October 24, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yu-Chi LIN, Huai-Tei YANG, Lun-Kuang TAN, Wei-Jen LO, Chih-Teng LIAO
  • Patent number: 12080582
    Abstract: A method for cleaning debris and contamination from an etching apparatus is provided. The etching apparatus includes a process chamber, a source of radio frequency power, an electrostatic chuck within the process chamber, a chuck electrode, and a source of DC power connected to the chuck electrode. The method of cleaning includes placing a substrate on a surface of the electrostatic chuck, applying a plasma to the substrate, thereby creating a positively charged surface on the surface of the substrate, applying a negative voltage or a radio frequency pulse to the electrode chuck, thereby making debris particles and/or contaminants from the surface of the electrostatic chuck negatively charged and causing them to attach to the positively charged surface of the substrate, and removing the substrate from the etching apparatus thereby removing the debris particles and/or contaminants from the etching apparatus.
    Type: Grant
    Filed: January 10, 2022
    Date of Patent: September 3, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yu-Chi Lin, Huai-Tei Yang, Lun-Kuang Tan, Wei-Jen Lo, Chih-Teng Liao
  • Patent number: 9094197
    Abstract: An energy efficient Ethernet physical layer (PHY) device including an EEE control module configured to generate a control signal to transition the PHY device into a low power consumption mode based an operating condition, and a pause frame generator module responsive to the control signals to generate a pause frame. The pause frame generator module is configured to send the pause frame to a media access control (MAC) device to reduce an incoming flow of data packets from the MAC device to the PHY device for a pause time duration. In operation, the pause frame generator module generates the pause frame including a pause time indicating the length of time for the PHY device to be in the low power consumption mode. The value of the pause time for each pause frame is determined adaptively based on the type of data traffic to be transmitted from the PHY device.
    Type: Grant
    Filed: December 16, 2014
    Date of Patent: July 28, 2015
    Assignee: Micrel, Inc.
    Inventors: Wei-Chieh Chang, Wei-Chi Lo, Charng-Show Li, Menping Chang
  • Publication number: 20150163045
    Abstract: An energy efficient Ethernet physical layer (PHY) device including an EEE control module configured to generate a control signal to transition the PHY device into a low power consumption mode based an operating condition, and a pause frame generator module responsive to the control signals to generate a pause frame. The pause frame generator module is configured to send the pause frame to a media access control (MAC) device to reduce an incoming flow of data packets from the MAC device to the PHY device for a pause time duration. In operation, the pause frame generator module generates the pause frame including a pause time indicating the length of time for the PHY device to be in the low power consumption mode. The value of the pause time for each pause frame is determined adaptively based on the type of data traffic to be transmitted from the PHY device.
    Type: Application
    Filed: December 16, 2014
    Publication date: June 11, 2015
    Inventors: Wei-Chieh Chang, Wei-Chi Lo, Charng-Show Li, Menping Chang
  • Patent number: 8942144
    Abstract: An energy efficient Ethernet physical layer (PHY) device including an EEE control module configured to generate a control signal to transition the PHY device into a low power consumption mode based an operating condition, and a pause frame generator module responsive to the control signals to generate a pause frame. The pause frame generator module is configured to send the pause frame to a media access control (MAC) device to reduce an incoming flow of data packets from the MAC device to the PHY device for a pause time duration. In operation, the pause frame generator module generates the pause frame including a pause time indicating the length of time for the PHY device to be in the low power consumption mode. The value of the pause time for each pause frame is determined adaptively based on the amount of data traffic to be transmitted from the PHY device.
    Type: Grant
    Filed: May 12, 2011
    Date of Patent: January 27, 2015
    Assignee: Micrel, Inc.
    Inventors: Wei-Chieh Chang, Wei-Chi Lo, Charng-Show Li, Menping Chang
  • Publication number: 20120287829
    Abstract: An energy efficient Ethernet physical layer (PHY) device including an EEE control module configured to generate a control signal to transition the PHY device into a low power consumption mode based an operating condition, and a pause frame generator module responsive to the control signals to generate a pause frame. The pause frame generator module is configured to send the pause frame to a media access control (MAC) device to reduce an incoming flow of data packets from the MAC device to the PHY device for a pause time duration. In operation, the pause frame generator module generates the pause frame including a pause time indicating the length of time for the PHY device to be in the low power consumption mode. The value of the pause time for each pause frame is determined adaptively based on the amount of data traffic to be transmitted from the PHY device.
    Type: Application
    Filed: May 12, 2011
    Publication date: November 15, 2012
    Applicant: MICREL, INC.
    Inventors: Wei-Chieh Chang, Wei-Chi Lo, Charng-Show Li, Menping Chang
  • Patent number: 6359943
    Abstract: In accordance with this invention, a data capture circuit of a data receiver captures data from a data stream of a data transmitter operating at a different phase or frequency from the system clock of the data receiver. In one embodiment, the data receiver determines the number of clock periods of a clock signal in a data period of the data stream. Specifically, a signal detection circuit receives a signal having a periodic and distinctive feature. The period of the periodic and distinctive feature is related to the data period by a fixed scaling factor. A counter counts the number of clock periods of the clock signal between a first occurrence of the periodic and distinctive feature and a second occurrence of the periodic and distinctive feature. A multiplier/divider circuit divides or multiples the content of the first counter by the scaling factor to determine the integer clock period count. The results of the multiply or divide is stored in a count register.
    Type: Grant
    Filed: December 13, 1999
    Date of Patent: March 19, 2002
    Assignee: Integrated Memory Logic, Inc.
    Inventor: Wei-Chi Lo
  • Patent number: 6134285
    Abstract: In accordance with this invention, a data capture circuit of a data receiver captures data from a data stream of a data transmitter operating at a different phase or frequency from the system clock of the data receiver. In one embodiment, the data receiver determines the number of clock periods of a clock signal in a data period of the data stream. Specifically, a signal detection circuit receives a signal having a periodic and distinctive feature. The period of the periodic and distinctive feature is related to the data period by a fixed scaling factor. A counter counts the number of clock periods of the clock signal between a first occurrence of the periodic and distinctive feature and a second occurrence of the periodic and distinctive feature. A multiplier/divider circuit divides or multiples the content of the first counter by the scaling factor to determine the integer clock period count. The results of the multiply or divide is stored in a count register.
    Type: Grant
    Filed: May 28, 1997
    Date of Patent: October 17, 2000
    Assignee: Integrated Memory Logic, Inc.
    Inventor: Wei-Chi Lo