Patents by Inventor Wei-Chieh Lien
Wei-Chieh Lien has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240128149Abstract: Some implementations described herein include systems and techniques for fabricating a semiconductor die package that includes a cooling interface region formed in surface of an integrated circuit die. The cooling interface region, which includes a combination of channel regions and pillar structures, may be directly exposed to a fluid above and/or around the semiconductor die package.Type: ApplicationFiled: March 27, 2023Publication date: April 18, 2024Inventors: Cheng-Chieh HSIEH, Wei-Kong SHENG, Ke-Han SHEN, Yu-Jen LIEN
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Publication number: 20230275022Abstract: A semiconductor device includes: a first semiconductor structure; a second semiconductor structure on the first semiconductor structure; an active region between the first semiconductor structure and the second semiconductor structure, wherein the active region comprises a well layer and a barrier layer, wherein the barrier layer has a band gap; a first electron blocking layer between the second semiconductor structure and the active region, wherein the first electron blocking layer comprises a band gap which is greater than the band gap of the barrier layer; a first aluminum-containing layer between the first electron blocking layer and the active region, wherein the first aluminum-containing layer has a band gap greater than the band gap of the first electron blocking layer; a confinement layer between the first aluminum-containing layer and the active region; and a second aluminum-containing layer between the second semiconductor structure and the first electron blocking layer; wherein both the first alumiType: ApplicationFiled: May 5, 2023Publication date: August 31, 2023Inventors: Yung-Chung PAN, Chang-Yu TSAI, Ching-Chung HU, Ming-Pao CHEN, Chi SHEN, Wei-Chieh LIEN
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Patent number: 11688690Abstract: A semiconductor device includes: a first semiconductor structure; a second semiconductor structure on the first semiconductor structure; an active region between the first semiconductor structure and the second semiconductor structure, wherein the active region includes multiple alternating well layers and barrier layers, wherein each of the barrier layers has a band gap, the active region further includes an upper surface facing the second semiconductor structure and a bottom surface opposite the upper surface; an electron blocking region between the second semiconductor structure and the active region, wherein the electron blocking region includes a band gap, and the band gap of the electron blocking region is greater than the band gap of one of the barrier layers; a first aluminum-containing layer between the electron blocking region and the active region, wherein the first aluminum-containing layer has a band gap greater than the band gap of the electron blocking region; a confinement layer between the fiType: GrantFiled: June 22, 2021Date of Patent: June 27, 2023Assignee: EPISTAR CORPORATIONInventors: Yung-Chung Pan, Chang-Yu Tsai, Ching-Chung Hu, Ming-Pao Chen, Chi Shen, Wei-Chieh Lien
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Publication number: 20230144521Abstract: A semiconductor device comprises: a first semiconductor structure; a second semiconductor structure on the first semiconductor structure; an active region between the first semiconductor structure and the second semiconductor structure, wherein the active region comprises multiple alternating well layers and first barrier layers, wherein each of the first barrier layers has a band gap, the active region further comprises an upper surface facing the second semiconductor structure and a bottom surface opposite the upper surface; a first electron blocking layer between the second semiconductor structure and the active region, wherein the first electron blocking layer having a band gap greater than the band gap of one of the first barrier layers; a first aluminum-containing layer between the first electron blocking layer and the active region, wherein the first aluminum-containing layer has a first thickness and a band gap greater than the band gap of the first electron blocking layer; and a second aluminum-contaType: ApplicationFiled: January 6, 2023Publication date: May 11, 2023Inventors: Chia-Ming LIU, Chang-Hua HSIEH, Yung-Chung PAN, Chang-Yu TSAI, Ching-Chung HU, Ming-Pao CHEN, Chi SHEN, Wei-Chieh LIEN
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Patent number: 11600746Abstract: A semiconductor device comprises: a first semiconductor structure; a second semiconductor structure on the first semiconductor structure; an active region, wherein the active region comprises multiple alternating well layers and barrier layers, the active region further comprises an upper surface facing the second semiconductor structure and a bottom surface opposite the upper surface; an electron blocking region between the second semiconductor structure and the active region; a first aluminum-containing layer between the electron blocking region and the active region, wherein the first aluminum-containing layer has a band gap greater than the band gap of the first electron blocking layer; and a p-type dopant above the bottom surface of the active region and comprising a concentration profile comprising a peak shape having a peak concentration value, wherein the peak concentration value lies at a distance of between 15 nm and 60 nm from the upper surface of the active region.Type: GrantFiled: April 2, 2021Date of Patent: March 7, 2023Assignee: EPISTAR CORPORATIONInventors: Chia-Ming Liu, Chang-Hua Hsieh, Yung-Chung Pan, Chang-Yu Tsai, Ching-Chung Hu, Ming-Pao Chen, Chi Shen, Wei-Chieh Lien
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Patent number: 11424383Abstract: A semiconductor device includes: a first semiconductor region; and a first electrode on the first semiconductor region; wherein first semiconductor region includes a first layer and a second layer, the second layer includes a first portion and a second portion adjacent to the first portion, the first portion has a first thickness, the second portion has a second thickness less than the first thickness, the first layer includes a first material and a first dopant, the first material includes multiple elements, the first dopant has a first concentration, the second layer includes a second material and a second dopant, the second material includes multiple elements, the second dopant has a second concentration, one of the elements of the first material of the first layer is different from the elements of the second material of the second layer.Type: GrantFiled: October 21, 2020Date of Patent: August 23, 2022Assignee: EPISTAR CORPORATIONInventors: Tzu-Chieh Hu, Wei-Chieh Lien, Chen Ou, Chia-Ming Liu, Tzu-Yi Chi
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Publication number: 20210391274Abstract: A semiconductor device includes: a first semiconductor structure; a second semiconductor structure on the first semiconductor structure; an active region between the first semiconductor structure and the second semiconductor structure, wherein the active region includes multiple alternating well layers and barrier layers, wherein each of the barrier layers has a band gap, the active region further includes an upper surface facing the second semiconductor structure and a bottom surface opposite the upper surface; an electron blocking region between the second semiconductor structure and the active region, wherein the electron blocking region includes a band gap, and the band gap of the electron blocking region is greater than the band gap of one of the barrier layers; a first aluminum-containing layer between the electron blocking region and the active region, wherein the first aluminum-containing layer has a band gap greater than the band gap of the electron blocking region; a confinement layer between the fiType: ApplicationFiled: June 22, 2021Publication date: December 16, 2021Inventors: Yung-Chung PAN, Chang-Yu TSAI, Ching-Chung HU, Ming-Pao CHEN, Chi SHEN, Wei-Chieh LIEN
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Publication number: 20210226094Abstract: A semiconductor device comprises: a first semiconductor structure; a second semiconductor structure on the first semiconductor structure; an active region, wherein the active region comprises multiple alternating well layers and barrier layers, the active region further comprises an upper surface facing the second semiconductor structure and a bottom surface opposite the upper surface; an electron blocking region between the second semiconductor structure and the active region; a first aluminum-containing layer between the electron blocking region and the active region, wherein the first aluminum-containing layer has a band gap greater than the band gap of the first electron blocking layer; and a p-type dopant above the bottom surface of the active region and comprising a concentration profile comprising a peak shape having a peak concentration value, wherein the peak concentration value lies at a distance of between 15 nm and 60 nm from the upper surface of the active region.Type: ApplicationFiled: April 2, 2021Publication date: July 22, 2021Inventors: Chia-Ming LIU, Chang-Hua HSIEH, Yung-Chung PAN, Chang-Yu TSAI, Ching-Chung HU, Ming-Pao CHEN, Chi SHEN, Wei-Chieh LIEN
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Patent number: 11056434Abstract: A semiconductor device comprises: a first semiconductor structure; a second semiconductor structure on the first semiconductor structure; an active region, wherein the active region comprises multiple alternating well layers and barrier layers, the active region further comprises an upper surface facing the second semiconductor structure and a bottom surface opposite the upper surface; an electron blocking region between the second semiconductor structure and the active region; a first aluminum-containing layer between the electron blocking region and the active region, wherein the first aluminum-containing layer has a band gap greater than the band gap of the first electron blocking layer; and a p-type dopant above the bottom surface of the active region and comprising a concentration profile comprising a peak shape having a peak concentration value, wherein the peak concentration value lies at a distance of between 15 nm and 60 nm from the upper surface of the active region.Type: GrantFiled: January 19, 2018Date of Patent: July 6, 2021Assignee: EPISTAR CORPORATIONInventors: Yung-Chung Pan, Chang-Yu Tsai, Ching-Chung Hu, Ming-Pao Chen, Chi Shen, Wei-Chieh Lien
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Patent number: 10971652Abstract: A semiconductor device comprises: a first semiconductor structure; a second semiconductor structure on the first semiconductor structure; an active region, wherein the active region comprises multiple alternating well layers and barrier layers, the active region further comprises an upper surface facing the second semiconductor structure and a bottom surface opposite the upper surface; an electron blocking region between the second semiconductor structure and the active region; a first aluminum-containing layer between the electron blocking region and the active region, wherein the first aluminum-containing layer has a band gap greater than the band gap of the first electron blocking layer; and a p-type dopant above the bottom surface of the active region and comprising a concentration profile comprising a peak shape having a peak concentration value, wherein the peak concentration value lies at a distance of between 15 nm and 60 nm from the upper surface of the active region.Type: GrantFiled: July 16, 2019Date of Patent: April 6, 2021Assignee: EPISTAR CORPORATIONInventors: Chia-Ming Liu, Chang-Hua Hsieh, Yung-Chung Pan, Chang-Yu Tsai, Ching-Chung Hu, Ming-Pao Chen, Chi Shen, Wei-Chieh Lien
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Publication number: 20210057603Abstract: A semiconductor device includes: a first semiconductor region; and a first electrode on the first semiconductor region; wherein first semiconductor region includes a first layer and a second layer, the second layer includes a first portion and a second portion adjacent to the first portion, the first portion has a first thickness, the second portion has a second thickness less than the first thickness, the first layer includes a first material and a first dopant, the first material includes multiple elements, the first dopant has a first concentration, the second layer includes a second material and a second dopant, the second material includes multiple elements, the second dopant has a second concentration, one of the elements of the first material of the first layer is different from the elements of the second material of the second layer.Type: ApplicationFiled: October 21, 2020Publication date: February 25, 2021Inventors: Tzu-Chieh HU, Wei-Chieh LIEN, Chen OU, Chia-Ming LIU, Tzu-Yi CHI
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Patent number: 10818818Abstract: A semiconductor device includes: a first semiconductor region; and a first electrode on the first semiconductor region; wherein first semiconductor region includes a first layer and a second layer, the second layer includes a first portion and a second portion adjacent to the first portion, the first portion has a first thickness, the second portion has a second thickness less than the first thickness, the first layer includes a first material and a first dopant, the first material includes multiple elements, the first dopant has a first concentration, the second layer includes a second material and a second dopant, the second material includes multiple elements, the second dopant has a second concentration, one of the elements of the first material of the first layer is different from the elements of the second material of the second layer.Type: GrantFiled: November 20, 2018Date of Patent: October 27, 2020Assignee: EPISTAR CORPORATIONInventors: Tzu-Chieh Hu, Wei-Chieh Lien, Chen Ou, Chia-Ming Liu, Tzu-Yi Chi
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Publication number: 20190341524Abstract: A semiconductor device comprises: a first semiconductor structure; a second semiconductor structure on the first semiconductor structure; an active region, wherein the active region comprises multiple alternating well layers and barrier layers, the active region further comprises an upper surface facing the second semiconductor structure and a bottom surface opposite the upper surface; an electron blocking region between the second semiconductor structure and the active region; a first aluminum-containing layer between the electron blocking region and the active region, wherein the first aluminum-containing layer has a band gap greater than the band gap of the first electron blocking layer; and a p-type dopant above the bottom surface of the active region and comprising a concentration profile comprising a peak shape having a peak concentration value, wherein the peak concentration value lies at a distance of between 15 nm and 60 nm from the upper surface of the active region.Type: ApplicationFiled: July 16, 2019Publication date: November 7, 2019Inventors: Chia-Ming LIU, Chang-Hua HSIEH, Yung-Chung PAN, Chang-Yu TSAI, Ching-Chung HU, Ming-Pao CHEN, Chi SHEN, Wei-Chieh LIEN
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Publication number: 20190165204Abstract: A semiconductor device includes: a first semiconductor region; and a first electrode on the first semiconductor region; wherein first semiconductor region includes a first layer and a second layer, the second layer includes a first portion and a second portion adjacent to the first portion, the first portion has a first thickness, the second portion has a second thickness less than the first thickness, the first layer includes a first material and a first dopant, the first material includes multiple elements, the first dopant has a first concentration, the second layer includes a second material and a second dopant, the second material includes multiple elements, the second dopant has a second concentration, one of the elements of the first material of the first layer is different from the elements of the second material of the second layer.Type: ApplicationFiled: November 20, 2018Publication date: May 30, 2019Inventors: Tzu-Chieh HU, Wei-Chieh LIEN, Chen OU, Chia-Ming LIU, Tzu-Yi CHI
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Publication number: 20180211919Abstract: A semiconductor device comprises: a first semiconductor structure; a second semiconductor structure on the first semiconductor structure; an active region, wherein the active region comprises multiple alternating well layers and barrier layers, the active region further comprises an upper surface facing the second semiconductor structure and a bottom surface opposite the upper surface; an electron blocking region between the second semiconductor structure and the active region; a first aluminum-containing layer between the electron blocking region and the active region, wherein the first aluminum-containing layer has a band gap greater than the band gap of the first electron blocking layer; and a p-type dopant above the bottom surface of the active region and comprising a concentration profile comprising a peak shape having a peak concentration value, wherein the peak concentration value lies at a distance of between 15 nm and 60 nm from the upper surface of the active region.Type: ApplicationFiled: January 19, 2018Publication date: July 26, 2018Inventors: Yung-Chung PAN, Chang-Yu TSAI, Ching-Chung HU, Ming-Pao CHEN, Chi SHEN, Wei-Chieh LIEN
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Publication number: 20070045607Abstract: The present invention discloses a AlGaInN nitride substrate structure using TiN as buffer layer and the manufacturing method thereof. The present invention deposits TiN having (111) surface onto the silicon substrate having (111) surface as a buffer layer, and grows III-V AlGaInN nitride epitaxy structure having (0001) surface. The present method can form high-quality III-V AlGaInN nitride epitaxy layer to manufacture the vertical-conducted III-V AlGaInN nitride devices and utilize the high-reflection TiN surface to enhance the efficiency of the opti-electrical devices. The present invention can further prevent the silicon substrate forming the noncrystalline SiNx in the AlGaInN epitaxy process, so that the yield of the chip can be improved.Type: ApplicationFiled: August 26, 2005Publication date: March 1, 2007Inventors: Nai-Chuan Chen, Chin-An Chang, Pen-Hsiu Chang, Chuan-Feng Shih, Wei-Chieh Lien