Patents by Inventor Wei-Chieh Lien

Wei-Chieh Lien has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240128149
    Abstract: Some implementations described herein include systems and techniques for fabricating a semiconductor die package that includes a cooling interface region formed in surface of an integrated circuit die. The cooling interface region, which includes a combination of channel regions and pillar structures, may be directly exposed to a fluid above and/or around the semiconductor die package.
    Type: Application
    Filed: March 27, 2023
    Publication date: April 18, 2024
    Inventors: Cheng-Chieh HSIEH, Wei-Kong SHENG, Ke-Han SHEN, Yu-Jen LIEN
  • Publication number: 20230275022
    Abstract: A semiconductor device includes: a first semiconductor structure; a second semiconductor structure on the first semiconductor structure; an active region between the first semiconductor structure and the second semiconductor structure, wherein the active region comprises a well layer and a barrier layer, wherein the barrier layer has a band gap; a first electron blocking layer between the second semiconductor structure and the active region, wherein the first electron blocking layer comprises a band gap which is greater than the band gap of the barrier layer; a first aluminum-containing layer between the first electron blocking layer and the active region, wherein the first aluminum-containing layer has a band gap greater than the band gap of the first electron blocking layer; a confinement layer between the first aluminum-containing layer and the active region; and a second aluminum-containing layer between the second semiconductor structure and the first electron blocking layer; wherein both the first alumi
    Type: Application
    Filed: May 5, 2023
    Publication date: August 31, 2023
    Inventors: Yung-Chung PAN, Chang-Yu TSAI, Ching-Chung HU, Ming-Pao CHEN, Chi SHEN, Wei-Chieh LIEN
  • Patent number: 11688690
    Abstract: A semiconductor device includes: a first semiconductor structure; a second semiconductor structure on the first semiconductor structure; an active region between the first semiconductor structure and the second semiconductor structure, wherein the active region includes multiple alternating well layers and barrier layers, wherein each of the barrier layers has a band gap, the active region further includes an upper surface facing the second semiconductor structure and a bottom surface opposite the upper surface; an electron blocking region between the second semiconductor structure and the active region, wherein the electron blocking region includes a band gap, and the band gap of the electron blocking region is greater than the band gap of one of the barrier layers; a first aluminum-containing layer between the electron blocking region and the active region, wherein the first aluminum-containing layer has a band gap greater than the band gap of the electron blocking region; a confinement layer between the fi
    Type: Grant
    Filed: June 22, 2021
    Date of Patent: June 27, 2023
    Assignee: EPISTAR CORPORATION
    Inventors: Yung-Chung Pan, Chang-Yu Tsai, Ching-Chung Hu, Ming-Pao Chen, Chi Shen, Wei-Chieh Lien
  • Publication number: 20230144521
    Abstract: A semiconductor device comprises: a first semiconductor structure; a second semiconductor structure on the first semiconductor structure; an active region between the first semiconductor structure and the second semiconductor structure, wherein the active region comprises multiple alternating well layers and first barrier layers, wherein each of the first barrier layers has a band gap, the active region further comprises an upper surface facing the second semiconductor structure and a bottom surface opposite the upper surface; a first electron blocking layer between the second semiconductor structure and the active region, wherein the first electron blocking layer having a band gap greater than the band gap of one of the first barrier layers; a first aluminum-containing layer between the first electron blocking layer and the active region, wherein the first aluminum-containing layer has a first thickness and a band gap greater than the band gap of the first electron blocking layer; and a second aluminum-conta
    Type: Application
    Filed: January 6, 2023
    Publication date: May 11, 2023
    Inventors: Chia-Ming LIU, Chang-Hua HSIEH, Yung-Chung PAN, Chang-Yu TSAI, Ching-Chung HU, Ming-Pao CHEN, Chi SHEN, Wei-Chieh LIEN
  • Patent number: 11600746
    Abstract: A semiconductor device comprises: a first semiconductor structure; a second semiconductor structure on the first semiconductor structure; an active region, wherein the active region comprises multiple alternating well layers and barrier layers, the active region further comprises an upper surface facing the second semiconductor structure and a bottom surface opposite the upper surface; an electron blocking region between the second semiconductor structure and the active region; a first aluminum-containing layer between the electron blocking region and the active region, wherein the first aluminum-containing layer has a band gap greater than the band gap of the first electron blocking layer; and a p-type dopant above the bottom surface of the active region and comprising a concentration profile comprising a peak shape having a peak concentration value, wherein the peak concentration value lies at a distance of between 15 nm and 60 nm from the upper surface of the active region.
    Type: Grant
    Filed: April 2, 2021
    Date of Patent: March 7, 2023
    Assignee: EPISTAR CORPORATION
    Inventors: Chia-Ming Liu, Chang-Hua Hsieh, Yung-Chung Pan, Chang-Yu Tsai, Ching-Chung Hu, Ming-Pao Chen, Chi Shen, Wei-Chieh Lien
  • Patent number: 11424383
    Abstract: A semiconductor device includes: a first semiconductor region; and a first electrode on the first semiconductor region; wherein first semiconductor region includes a first layer and a second layer, the second layer includes a first portion and a second portion adjacent to the first portion, the first portion has a first thickness, the second portion has a second thickness less than the first thickness, the first layer includes a first material and a first dopant, the first material includes multiple elements, the first dopant has a first concentration, the second layer includes a second material and a second dopant, the second material includes multiple elements, the second dopant has a second concentration, one of the elements of the first material of the first layer is different from the elements of the second material of the second layer.
    Type: Grant
    Filed: October 21, 2020
    Date of Patent: August 23, 2022
    Assignee: EPISTAR CORPORATION
    Inventors: Tzu-Chieh Hu, Wei-Chieh Lien, Chen Ou, Chia-Ming Liu, Tzu-Yi Chi
  • Publication number: 20210391274
    Abstract: A semiconductor device includes: a first semiconductor structure; a second semiconductor structure on the first semiconductor structure; an active region between the first semiconductor structure and the second semiconductor structure, wherein the active region includes multiple alternating well layers and barrier layers, wherein each of the barrier layers has a band gap, the active region further includes an upper surface facing the second semiconductor structure and a bottom surface opposite the upper surface; an electron blocking region between the second semiconductor structure and the active region, wherein the electron blocking region includes a band gap, and the band gap of the electron blocking region is greater than the band gap of one of the barrier layers; a first aluminum-containing layer between the electron blocking region and the active region, wherein the first aluminum-containing layer has a band gap greater than the band gap of the electron blocking region; a confinement layer between the fi
    Type: Application
    Filed: June 22, 2021
    Publication date: December 16, 2021
    Inventors: Yung-Chung PAN, Chang-Yu TSAI, Ching-Chung HU, Ming-Pao CHEN, Chi SHEN, Wei-Chieh LIEN
  • Publication number: 20210226094
    Abstract: A semiconductor device comprises: a first semiconductor structure; a second semiconductor structure on the first semiconductor structure; an active region, wherein the active region comprises multiple alternating well layers and barrier layers, the active region further comprises an upper surface facing the second semiconductor structure and a bottom surface opposite the upper surface; an electron blocking region between the second semiconductor structure and the active region; a first aluminum-containing layer between the electron blocking region and the active region, wherein the first aluminum-containing layer has a band gap greater than the band gap of the first electron blocking layer; and a p-type dopant above the bottom surface of the active region and comprising a concentration profile comprising a peak shape having a peak concentration value, wherein the peak concentration value lies at a distance of between 15 nm and 60 nm from the upper surface of the active region.
    Type: Application
    Filed: April 2, 2021
    Publication date: July 22, 2021
    Inventors: Chia-Ming LIU, Chang-Hua HSIEH, Yung-Chung PAN, Chang-Yu TSAI, Ching-Chung HU, Ming-Pao CHEN, Chi SHEN, Wei-Chieh LIEN
  • Patent number: 11056434
    Abstract: A semiconductor device comprises: a first semiconductor structure; a second semiconductor structure on the first semiconductor structure; an active region, wherein the active region comprises multiple alternating well layers and barrier layers, the active region further comprises an upper surface facing the second semiconductor structure and a bottom surface opposite the upper surface; an electron blocking region between the second semiconductor structure and the active region; a first aluminum-containing layer between the electron blocking region and the active region, wherein the first aluminum-containing layer has a band gap greater than the band gap of the first electron blocking layer; and a p-type dopant above the bottom surface of the active region and comprising a concentration profile comprising a peak shape having a peak concentration value, wherein the peak concentration value lies at a distance of between 15 nm and 60 nm from the upper surface of the active region.
    Type: Grant
    Filed: January 19, 2018
    Date of Patent: July 6, 2021
    Assignee: EPISTAR CORPORATION
    Inventors: Yung-Chung Pan, Chang-Yu Tsai, Ching-Chung Hu, Ming-Pao Chen, Chi Shen, Wei-Chieh Lien
  • Patent number: 10971652
    Abstract: A semiconductor device comprises: a first semiconductor structure; a second semiconductor structure on the first semiconductor structure; an active region, wherein the active region comprises multiple alternating well layers and barrier layers, the active region further comprises an upper surface facing the second semiconductor structure and a bottom surface opposite the upper surface; an electron blocking region between the second semiconductor structure and the active region; a first aluminum-containing layer between the electron blocking region and the active region, wherein the first aluminum-containing layer has a band gap greater than the band gap of the first electron blocking layer; and a p-type dopant above the bottom surface of the active region and comprising a concentration profile comprising a peak shape having a peak concentration value, wherein the peak concentration value lies at a distance of between 15 nm and 60 nm from the upper surface of the active region.
    Type: Grant
    Filed: July 16, 2019
    Date of Patent: April 6, 2021
    Assignee: EPISTAR CORPORATION
    Inventors: Chia-Ming Liu, Chang-Hua Hsieh, Yung-Chung Pan, Chang-Yu Tsai, Ching-Chung Hu, Ming-Pao Chen, Chi Shen, Wei-Chieh Lien
  • Publication number: 20210057603
    Abstract: A semiconductor device includes: a first semiconductor region; and a first electrode on the first semiconductor region; wherein first semiconductor region includes a first layer and a second layer, the second layer includes a first portion and a second portion adjacent to the first portion, the first portion has a first thickness, the second portion has a second thickness less than the first thickness, the first layer includes a first material and a first dopant, the first material includes multiple elements, the first dopant has a first concentration, the second layer includes a second material and a second dopant, the second material includes multiple elements, the second dopant has a second concentration, one of the elements of the first material of the first layer is different from the elements of the second material of the second layer.
    Type: Application
    Filed: October 21, 2020
    Publication date: February 25, 2021
    Inventors: Tzu-Chieh HU, Wei-Chieh LIEN, Chen OU, Chia-Ming LIU, Tzu-Yi CHI
  • Patent number: 10818818
    Abstract: A semiconductor device includes: a first semiconductor region; and a first electrode on the first semiconductor region; wherein first semiconductor region includes a first layer and a second layer, the second layer includes a first portion and a second portion adjacent to the first portion, the first portion has a first thickness, the second portion has a second thickness less than the first thickness, the first layer includes a first material and a first dopant, the first material includes multiple elements, the first dopant has a first concentration, the second layer includes a second material and a second dopant, the second material includes multiple elements, the second dopant has a second concentration, one of the elements of the first material of the first layer is different from the elements of the second material of the second layer.
    Type: Grant
    Filed: November 20, 2018
    Date of Patent: October 27, 2020
    Assignee: EPISTAR CORPORATION
    Inventors: Tzu-Chieh Hu, Wei-Chieh Lien, Chen Ou, Chia-Ming Liu, Tzu-Yi Chi
  • Publication number: 20190341524
    Abstract: A semiconductor device comprises: a first semiconductor structure; a second semiconductor structure on the first semiconductor structure; an active region, wherein the active region comprises multiple alternating well layers and barrier layers, the active region further comprises an upper surface facing the second semiconductor structure and a bottom surface opposite the upper surface; an electron blocking region between the second semiconductor structure and the active region; a first aluminum-containing layer between the electron blocking region and the active region, wherein the first aluminum-containing layer has a band gap greater than the band gap of the first electron blocking layer; and a p-type dopant above the bottom surface of the active region and comprising a concentration profile comprising a peak shape having a peak concentration value, wherein the peak concentration value lies at a distance of between 15 nm and 60 nm from the upper surface of the active region.
    Type: Application
    Filed: July 16, 2019
    Publication date: November 7, 2019
    Inventors: Chia-Ming LIU, Chang-Hua HSIEH, Yung-Chung PAN, Chang-Yu TSAI, Ching-Chung HU, Ming-Pao CHEN, Chi SHEN, Wei-Chieh LIEN
  • Publication number: 20190165204
    Abstract: A semiconductor device includes: a first semiconductor region; and a first electrode on the first semiconductor region; wherein first semiconductor region includes a first layer and a second layer, the second layer includes a first portion and a second portion adjacent to the first portion, the first portion has a first thickness, the second portion has a second thickness less than the first thickness, the first layer includes a first material and a first dopant, the first material includes multiple elements, the first dopant has a first concentration, the second layer includes a second material and a second dopant, the second material includes multiple elements, the second dopant has a second concentration, one of the elements of the first material of the first layer is different from the elements of the second material of the second layer.
    Type: Application
    Filed: November 20, 2018
    Publication date: May 30, 2019
    Inventors: Tzu-Chieh HU, Wei-Chieh LIEN, Chen OU, Chia-Ming LIU, Tzu-Yi CHI
  • Publication number: 20180211919
    Abstract: A semiconductor device comprises: a first semiconductor structure; a second semiconductor structure on the first semiconductor structure; an active region, wherein the active region comprises multiple alternating well layers and barrier layers, the active region further comprises an upper surface facing the second semiconductor structure and a bottom surface opposite the upper surface; an electron blocking region between the second semiconductor structure and the active region; a first aluminum-containing layer between the electron blocking region and the active region, wherein the first aluminum-containing layer has a band gap greater than the band gap of the first electron blocking layer; and a p-type dopant above the bottom surface of the active region and comprising a concentration profile comprising a peak shape having a peak concentration value, wherein the peak concentration value lies at a distance of between 15 nm and 60 nm from the upper surface of the active region.
    Type: Application
    Filed: January 19, 2018
    Publication date: July 26, 2018
    Inventors: Yung-Chung PAN, Chang-Yu TSAI, Ching-Chung HU, Ming-Pao CHEN, Chi SHEN, Wei-Chieh LIEN
  • Publication number: 20070045607
    Abstract: The present invention discloses a AlGaInN nitride substrate structure using TiN as buffer layer and the manufacturing method thereof. The present invention deposits TiN having (111) surface onto the silicon substrate having (111) surface as a buffer layer, and grows III-V AlGaInN nitride epitaxy structure having (0001) surface. The present method can form high-quality III-V AlGaInN nitride epitaxy layer to manufacture the vertical-conducted III-V AlGaInN nitride devices and utilize the high-reflection TiN surface to enhance the efficiency of the opti-electrical devices. The present invention can further prevent the silicon substrate forming the noncrystalline SiNx in the AlGaInN epitaxy process, so that the yield of the chip can be improved.
    Type: Application
    Filed: August 26, 2005
    Publication date: March 1, 2007
    Inventors: Nai-Chuan Chen, Chin-An Chang, Pen-Hsiu Chang, Chuan-Feng Shih, Wei-Chieh Lien