Patents by Inventor Wei-Chih Chuang

Wei-Chih Chuang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250241038
    Abstract: A semiconductor device includes a gate structure on a substrate, a first spacer on a sidewall of the gate structure, a second spacer on a sidewall of the first spacer, a third spacer on a sidewall of the second spacer, and first and second stacks of an epitaxial layer and a cap layer respectively disposed at first and second sides of the gate structure. Preferably, a part of the second spacer comprises an I-shape, the cap layer includes a planar top surface and an inclined sidewall, the cap layer contacts the second spacer and the third spacer directly, and the cap layer includes a vertical sidewall connected to the inclined sidewall.
    Type: Application
    Filed: April 8, 2025
    Publication date: July 24, 2025
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Wei-Chih Chuang, Chia-Jong Liu, Kuang-Hsiu Chen, Chung-Ting Huang, Chi-Hsuan Tang, Kai-Hsiang Wang, Bing-Yang Jiang, Yu-Lin Cheng, Chun-Jen Chen, Yu-Shu Lin, Jhong-Yi Huang, Chao-Nan Chen, Guan-Ying Wu
  • Patent number: 12300743
    Abstract: A semiconductor device includes a gate structure on a substrate, a first spacer on a sidewall of the gate structure, a second spacer on a sidewall of the first spacer, a third spacer on a sidewall of the second spacer, and first and second stacks of an epitaxial layer and a cap layer respectively disposed at first and second sides of the gate structure. Preferably, a part of the second spacer comprises an I-shape, the cap layer includes a planar top surface and an inclined sidewall, the cap layer contacts the second spacer and the third spacer directly, and the cap layer includes a vertical sidewall connected to the inclined sidewall.
    Type: Grant
    Filed: May 16, 2024
    Date of Patent: May 13, 2025
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Wei-Chih Chuang, Chia-Jong Liu, Kuang-Hsiu Chen, Chung-Ting Huang, Chi-Hsuan Tang, Kai-Hsiang Wang, Bing-Yang Jiang, Yu-Lin Cheng, Chun-Jen Chen, Yu-Shu Lin, Jhong-Yi Huang, Chao-Nan Chen, Guan-Ying Wu
  • Publication number: 20240304705
    Abstract: A semiconductor device includes a gate structure on a substrate, a first spacer on a sidewall of the gate structure, a second spacer on a sidewall of the first spacer, a third spacer on a sidewall of the second spacer, and first and second stacks of an epitaxial layer and a cap layer respectively disposed at first and second sides of the gate structure. Preferably, a part of the second spacer comprises an I-shape, the cap layer includes a planar top surface and an inclined sidewall, the cap layer contacts the second spacer and the third spacer directly, and the cap layer includes a vertical sidewall connected to the inclined sidewall.
    Type: Application
    Filed: May 16, 2024
    Publication date: September 12, 2024
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Wei-Chih Chuang, Chia-Jong Liu, Kuang-Hsiu Chen, Chung-Ting Huang, Chi-Hsuan Tang, Kai-Hsiang Wang, Bing-Yang Jiang, Yu-Lin Cheng, Chun-Jen Chen, Yu-Shu Lin, Jhong-Yi Huang, Chao-Nan Chen, Guan-Ying Wu
  • Patent number: 12021134
    Abstract: A semiconductor device includes a gate structure on a substrate, a first spacer on a sidewall of the gate structure, a second spacer on a sidewall of the first spacer, a third spacer on a sidewall of the second spacer, and first and second stacks of an epitaxial layer and a cap layer respectively disposed at first and second sides of the gate structure. Preferably, a part of the second spacer comprises an I-shape, the cap layer includes a planar top surface and an inclined sidewall, the cap layer contacts the second spacer and the third spacer directly, and the cap layer includes a vertical sidewall connected to the inclined sidewall.
    Type: Grant
    Filed: December 1, 2022
    Date of Patent: June 25, 2024
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Wei-Chih Chuang, Chia-Jong Liu, Kuang-Hsiu Chen, Chung-Ting Huang, Chi-Hsuan Tang, Kai-Hsiang Wang, Bing-Yang Jiang, Yu-Lin Cheng, Chun-Jen Chen, Yu-Shu Lin, Jhong-Yi Huang, Chao-Nan Chen, Guan-Ying Wu
  • Publication number: 20230097129
    Abstract: A method for fabricating semiconductor device includes the steps of: forming a gate structure on a substrate; forming a first spacer and a second spacer around the gate structure; forming a recess adjacent to two sides of the second spacer; performing a cleaning process to trim the second spacer for forming a void between the first spacer and the substrate; and forming an epitaxial layer in the recess.
    Type: Application
    Filed: December 1, 2022
    Publication date: March 30, 2023
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Wei-Chih Chuang, Chia-Jong Liu, Kuang-Hsiu Chen, Chung-Ting Huang, Chi-Hsuan Tang, Kai-Hsiang Wang, Bing-Yang Jiang, Yu-Lin Cheng, Chun-Jen Chen, Yu-Shu Lin, Jhong-Yi Huang, Chao-Nan Chen, Guan-Ying Wu
  • Patent number: 11545560
    Abstract: A method for fabricating semiconductor device includes the steps of: forming a gate structure on a substrate; forming a first spacer and a second spacer around the gate structure; forming a recess adjacent to two sides of the second spacer; performing a cleaning process to trim the second spacer for forming a void between the first spacer and the substrate; and forming an epitaxial layer in the recess.
    Type: Grant
    Filed: January 28, 2021
    Date of Patent: January 3, 2023
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Wei-Chih Chuang, Chia-Jong Liu, Kuang-Hsiu Chen, Chung-Ting Huang, Chi-Hsuan Tang, Kai-Hsiang Wang, Bing-Yang Jiang, Yu-Lin Cheng, Chun-Jen Chen, Yu-Shu Lin, Jhong-Yi Huang, Chao-Nan Chen, Guan-Ying Wu
  • Publication number: 20210151580
    Abstract: A method for fabricating semiconductor device includes the steps of: forming a gate structure on a substrate; forming a first spacer and a second spacer around the gate structure; forming a recess adjacent to two sides of the second spacer; performing a cleaning process to trim the second spacer for forming a void between the first spacer and the substrate; and forming an epitaxial layer in the recess.
    Type: Application
    Filed: January 28, 2021
    Publication date: May 20, 2021
    Inventors: Wei-Chih Chuang, Chia-Jong Liu, Kuang-Hsiu Chen, Chung-Ting Huang, Chi-Hsuan Tang, Kai-Hsiang Wang, Bing-Yang Jiang, Yu-Lin Cheng, Chun-Jen Chen, Yu-Shu Lin, Jhong-Yi Huang, Chao-Nan Chen, Guan-Ying Wu
  • Patent number: 10943991
    Abstract: A semiconductor device and a method for fabricating the semiconductor device are provided, in which the method includes the steps of forming a gate structure on a substrate, forming a spacer on a sidewall of the gate structure, forming two recesses adjacent to two sides of the spacer, performing a cleaning process to trim the spacer for forming a void between the spacer and the substrate, and forming two portions of an epitaxial layer in the two recesses. The semiconductor device preferably includes a cap layer on the two portions of the epitaxial layer as the cap layer includes a planar top surface and an inclined sidewall.
    Type: Grant
    Filed: March 6, 2019
    Date of Patent: March 9, 2021
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Wei-Chih Chuang, Chia-Jong Liu, Kuang-Hsiu Chen, Chung-Ting Huang, Chi-Hsuan Tang, Kai-Hsiang Wang, Bing-Yang Jiang, Yu-Lin Cheng, Chun-Jen Chen, Yu-Shu Lin, Jhong-Yi Huang, Chao-Nan Chen, Guan-Ying Wu
  • Publication number: 20200243664
    Abstract: A semiconductor device and a method for fabricating the semiconductor device are provided, in which the method includes the steps of forming a gate structure on a substrate, forming a spacer on a sidewall of the gate structure, forming two recesses adjacent to two sides of the spacer, performing a cleaning process to trim the spacer for forming a void between the spacer and the substrate, and forming two portions of an epitaxial layer in the two recesses. The semiconductor device preferably includes a cap layer on the two portions of the epitaxial layer as the cap layer includes a planar top surface and an inclined sidewall.
    Type: Application
    Filed: March 6, 2019
    Publication date: July 30, 2020
    Inventors: Wei-Chih Chuang, Chia-Jong Liu, Kuang-Hsiu Chen, Chung-Ting Huang, Chi-Hsuan Tang, Kai-Hsiang Wang, Bing-Yang Jiang, Yu-Lin Cheng, Chun-Jen Chen, Yu-Shu Lin, Jhong-Yi Huang, Chao-Nan Chen, Guan-Ying Wu
  • Patent number: 8335997
    Abstract: A method for sorting menu options in a program menu of an electronic device creates an order parameter, a basic count parameter, and a carry count parameter to each menu option. The basic count parameters, the carry count parameters, and the order parameters are recalculated in response to a user-selected menu option, a user-added menu option, or a user-deleted menu option. The menu options are displayed according to the order parameters.
    Type: Grant
    Filed: July 24, 2009
    Date of Patent: December 18, 2012
    Assignee: Chi Mei Communication Systems, Inc.
    Inventors: Wei-Chih Chuang, Sheng-Chien Huang
  • Publication number: 20100070923
    Abstract: A method for sorting menu options in a program menu of an electronic device creates an order parameter, a basic count parameter, and a carry count parameter to each menu option. The basic count parameters, the carry count parameters, and the order parameters are recalculated in response to a user-selected menu option, a user-added menu option, or a user-deleted menu option. The menu options are displayed according to the order parameters.
    Type: Application
    Filed: July 24, 2009
    Publication date: March 18, 2010
    Applicant: CHI MEI COMMUNICATION SYSTEMS, INC.
    Inventors: WEI-CHIH CHUANG, SHENG-CHIEN HUANG
  • Patent number: 4578830
    Abstract: The present invention relates to a lifting device for stool cover, and in particular to one comprising a bracket having a lug at one end and a supporting portion at the other end, an upper rack slidably fitted with the upper part of the supporting portion, a lower rack slidably fitted with the lower part of the supporting portion, an outer shaft inserted into the bracket, an inner shaft inserted into the outer shaft, a driving arm pivoted on the lower part of the supporting portion, a tubular member secured to the lower part of the driving arm, a controlling lever fixedly connected with the tubular member at the lower end, a stool lid having a square hole adapted to the outer shaft and a stool seat having a square hole adapted to the inner shaft.
    Type: Grant
    Filed: February 15, 1985
    Date of Patent: April 1, 1986
    Inventor: Wei-Chih Chuang