Patents by Inventor Wei-Chou Lan
Wei-Chou Lan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9614101Abstract: Disclosed herein is a method for manufacturing an array substrate. The method includes forming a source electrode and a drain electrode on a substrate. A semiconductor layer, an organic insulating layer, and a gate electrode layer are sequentially formed to cover the substrate, the source electrode, and the drain electrode. A patterned photoresist layer is formed on the gate electrode layer. The exposed portion of the gate electrode layer, and a portion of the organic insulative layer and a portion of the semiconductor layer thereunder are removed to form a gate electrode. An organic passivation layer is formed on the gate electrode, the source electrode, and the drain electrode. The organic passivation layer has a contact window to expose a portion of the drain electrode. A pixel electrode is formed on the organic passivation layer and the exposed portion of the drain electrode.Type: GrantFiled: September 4, 2015Date of Patent: April 4, 2017Assignee: E Ink Holdings Inc.Inventors: Wei-Chou Lan, Ted-Hong Shinn, Henry Wang, Chia-Chun Yeh
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Patent number: 9564537Abstract: Disclosed herein is a method for manufacturing an array substrate. The method includes forming a source electrode and a drain electrode on a substrate. A semiconductor layer, an organic insulating layer, and a gate electrode layer are sequentially formed to cover the substrate, the source electrode, and the drain electrode. A patterned photoresist layer is formed on the gate electrode layer. The exposed portion of the gate electrode layer, and a portion of the organic insulative layer and a portion of the semiconductor layer thereunder are removed to form a gate electrode. An organic passivation layer is formed on the gate electrode, the source electrode, and the drain electrode. The organic passivation layer has a contact window to expose a portion of the drain electrode. A pixel electrode is formed on the organic passivation layer and the exposed portion of the drain electrode.Type: GrantFiled: September 21, 2015Date of Patent: February 7, 2017Assignee: E Ink Holdings Inc.Inventors: Wei-Chou Lan, Ted-Hong Shinn, Henry Wang, Chia-Chun Yeh
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Patent number: 9520451Abstract: An organic light-emitting diode display device includes a substrate, a light-absorption layer, an active array structure, and an organic light-emitting diode. The substrate has a first and a second surface opposite to each other. The light-absorption layer is disposed on the first surface, and has at least one opening exposing a portion of the first surface. The active array structure is positioned on the second surface, and includes at least one data line, at least one gate line, and at least one switching device electrically connected to the gate and data lines. The light-absorption layer overlaps at least one of the data line and the gate line when viewed in a direction perpendicular to the substrate. The organic light-emitting diode is electrically connected to the switching device, and the organic light-emitting diode overlaps the opening when viewed in the direction perpendicular to the substrate.Type: GrantFiled: August 20, 2014Date of Patent: December 13, 2016Assignee: E Ink Holdings Inc.Inventors: Wei-Chou Lan, Ted-Hong Shinn, Xue-Hung Tsai, Chi-Liang Wu, Chih-Hsiang Yang
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Patent number: 9368630Abstract: A thin film transistor is disclosed. The drain and source electrode layer of the thin film transistor is disposed on the substrate, in which the drain and source electrode layer is divided into a drain region and a source region. The semiconductor layer and the first insulating layer are disposed on the drain and source electrode layer, in which the first insulating layer has an upper limit of thickness. The second insulating layer is disposed on the semiconductor layer and the first insulating layer, in which the second insulating layer has a lower limit of thickness. The gate electrode layer is disposed on the second insulating layer. The passivation layer is disposed on the gate electrode layer, and the pixel electrode layer is disposed on the passivation layer.Type: GrantFiled: January 28, 2013Date of Patent: June 14, 2016Assignee: E Ink Holdings Inc.Inventors: Wei-Chou Lan, Ted-Hong Shinn
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Patent number: 9261265Abstract: A backlight display device includes a pixel region, a light-emitting region, a control element, a plurality of first flexible printed circuit board (FPCB) contacts, and a plurality of first driving circuits. The pixel region has a first edge, a second edge opposite to the first edge, a third edge, and a fourth edge opposite to the third edge. A corner region is formed between the first edge and the fourth edge. The light-emitting region is located on the corner region of the pixel region. The control element is located on the corner region of the pixel region and between the light-emitting region and the first edge. The first FPCB contacts are located on the second edge. Each of the first driving circuits is electrically connected to one of the first FPCB contacts and the control element.Type: GrantFiled: May 29, 2015Date of Patent: February 16, 2016Assignee: E Ink Holdings Inc.Inventors: Shu-Ping Yan, Pei-Lin Huang, Wei-Chou Lan, Chia-Chun Yeh
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Publication number: 20160033120Abstract: A backlight display device includes a pixel region, a light-emitting region, a control element, a plurality of first flexible printed circuit board (FPCB) contacts, and a plurality of first driving circuits. The pixel region has a first edge, a second edge opposite to the first edge, a third edge, and a fourth edge opposite to the third edge. A corner region is formed between the first edge and the fourth edge. The light-emitting region is located on the corner region of the pixel region. The control element is located on the corner region of the pixel region and between the light-emitting region and the first edge. The first FPCB contacts are located on the second edge. Each of the first driving circuits is electrically connected to one of the first FPCB contacts and the control element.Type: ApplicationFiled: May 29, 2015Publication date: February 4, 2016Inventors: Shu-Ping YAN, Pei-Lin HUANG, Wei-Chou LAN, Chia-Chun YEH
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Publication number: 20160013322Abstract: Disclosed herein is a method for manufacturing an array substrate. The method includes forming a source electrode and a drain electrode on a substrate. A semiconductor layer, an organic insulating layer, and a gate electrode layer are sequentially formed to cover the substrate, the source electrode, and the drain electrode. A patterned photoresist layer is formed on the gate electrode layer. The exposed portion of the gate electrode layer, and a portion of the organic insulative layer and a portion of the semiconductor layer thereunder are removed to form a gate electrode. An organic passivation layer is formed on the gate electrode, the source electrode, and the drain electrode. The organic passivation layer has a contact window to expose a portion of the drain electrode. A pixel electrode is formed on the organic passivation layer and the exposed portion of the drain electrode.Type: ApplicationFiled: September 21, 2015Publication date: January 14, 2016Inventors: Wei-Chou LAN, Ted-Hong SHINN, Henry WANG, Chia-Chun YEH
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Publication number: 20150380445Abstract: Disclosed herein is a method for manufacturing an array substrate. The method includes forming a source electrode and a drain electrode on a substrate. A semiconductor layer, an organic insulating layer, and a gate electrode layer are sequentially formed to cover the substrate, the source electrode, and the drain electrode. A patterned photoresist layer is formed on the gate electrode layer. The exposed portion of the gate electrode layer, and a portion of the organic insulative layer and a portion of the semiconductor layer thereunder are removed to form a gate electrode. An organic passivation layer is formed on the gate electrode, the source electrode, and the drain electrode. The organic passivation layer has a contact window to expose a portion of the drain electrode. A pixel electrode is formed on the organic passivation layer and the exposed portion of the drain electrode.Type: ApplicationFiled: September 4, 2015Publication date: December 31, 2015Inventors: Wei-Chou LAN, Ted-Hong SHINN, Henry WANG, Chia-Chun YEH
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Patent number: 9182641Abstract: The signal line structure is disposed between a gate driver and a display area of a display. The signal line structure includes a substrate, first metal layers, a first insulation layer, second metal layers, a second insulation layer and third metal layers. The first metal layers are arranged in parallel and toward a first direction in the substrate. The first insulation layer is disposed in the substrate and covers the first metal layers. The second metal layers are disposed on the positions of the first insulation layer corresponding to the first metal layers. The second insulation layer is disposed on the second metal layers and the first insulation layer. The third metal layers are disposed on the positions corresponding to the second metal layers in the second insulation layer. The distance between two adjacent second metal layers is less than that between two adjacent first metal layers.Type: GrantFiled: June 23, 2011Date of Patent: November 10, 2015Assignee: E Ink Holdings Inc.Inventors: Wei-Chou Lan, Sung-Hui Huang, Chia-Chun Yeh, Ted-Hong Shinn
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Patent number: 9165955Abstract: Disclosed herein is a method for manufacturing an array substrate. The method includes forming a source electrode and a drain electrode on a substrate. A semiconductor layer, an organic insulating layer, and a gate electrode layer are sequentially formed to cover the substrate, the source electrode, and the drain electrode. A patterned photoresist layer is formed on the gate electrode layer. The exposed portion of the gate electrode layer, and a portion of the organic insulative layer and a portion of the semiconductor layer thereunder are removed to form a gate electrode. An organic passivation layer is formed on the gate electrode, the source electrode, and the drain electrode. The organic passivation layer has a contact window to expose a portion of the drain electrode. A pixel electrode is formed on the organic passivation layer and the exposed portion of the drain electrode.Type: GrantFiled: June 21, 2012Date of Patent: October 20, 2015Assignee: E Ink Holdings Inc.Inventors: Wei-Chou Lan, Ted-Hong Shinn, Henry Wang, Chia-Chun Yeh
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Patent number: 9116372Abstract: An exemplary driving substrate includes a substrate, a plurality of first and second signal transmission lines, a first insulation layer and a plurality of switch devices. The first signal transmission lines are disposed on the substrate, and each includes a first line segment(s) and a first connecting segment(s). The first insulation layer is disposed between each first line segment and each first connecting segment, and each first connecting segment is electrically connected to the adjacent first line segment(s) through an opening(s) of the first insulation layer. The second signal transmission lines are disposed on the substrate and electrically insulated and intersected with the first signal transmission lines thereby defining a plurality of pixel regions on the substrate. The switch devices are respectively disposed in the pixel regions, and each is electrically connected to corresponding first and second signal transmission lines. The driving substrate has better reliability.Type: GrantFiled: May 25, 2012Date of Patent: August 25, 2015Assignee: E INK HOLDINGS INC.Inventors: Henry Wang, Ted-Hong Shinn, Chia-Chun Yeh, Wei-Chou Lan
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Patent number: 9112042Abstract: A thin film transistor suitable for being disposed on a substrate is provided. The thin film transistor includes a gate electrode, an organic gate dielectric layer, a metal oxide semiconductor layer, a source electrode and a drain electrode. The gate electrode is disposed on the substrate. The organic gate dielectric layer is disposed on the substrate to cover the gate electrode. The source electrode, the drain electrode and the metal oxide semiconductor layer are disposed above the organic gate dielectric layer, and the metal oxide semiconductor layer contacts with the source electrode and the drain electrode. Because the channel layer of the thin film transistor is a layer of metal oxide semiconductor formed at a lower temperature, thus the thin film transistor can be widely applied into various display applications such as flexible display devices.Type: GrantFiled: September 12, 2012Date of Patent: August 18, 2015Assignee: E INK HOLDINGS INC.Inventors: Wei-Chou Lan, Ted-Hong Shinn, Henry Wang, Chia-Chun Yeh
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Patent number: 9040987Abstract: A semiconductor device including a substrate, a metal layer, an insulating layer, a semiconductor layer, a drain and a source is provided. The substrate has a surface and a first cavity. The metal layer is disposed on the substrate and covers the surface and inner-wall of the first cavity to define a second cavity corresponding to the first cavity. The insulating layer covers the metal layer and inner-wall of the second cavity to define a third cavity corresponding to the second cavity. The semiconductor layer exposes a portion of the insulating layer and covers the inner-wall of the third cavity to define a fourth cavity corresponding to the third cavity. The drain and source are disposed on the semiconductor layer and covers a portion of the semiconductor layer and a portion of the insulating layer, in which the drain and source expose the fourth cavity.Type: GrantFiled: December 20, 2012Date of Patent: May 26, 2015Assignee: E Ink Holdings Inc.Inventors: Wei-Chou Lan, Ted-Hong Shinn, Henry Wang, Chia-Chun Yeh
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Publication number: 20150137091Abstract: An organic light-emitting diode display device includes a substrate, a light-absorption layer, an active array structure, and an organic light-emitting diode. The substrate has a first and a second surface opposite to each other. The light-absorption layer is disposed on the first surface, and has at least one opening exposing a portion of the first surface. The active array structure is positioned on the second surface, and includes at least one data line, at least one gate line, and at least one switching device electrically connected to the gate and data lines. The light-absorption layer overlaps at least one of the data line and the gate line when viewed in a direction perpendicular to the substrate. The organic light-emitting diode is electrically connected to the switching device, and the organic light-emitting diode overlaps the opening when viewed in the direction perpendicular to the substrate.Type: ApplicationFiled: August 20, 2014Publication date: May 21, 2015Inventors: Wei-Chou LAN, Ted-Hong SHINN, Xue-Hung TSAI, Chi-Liang WU, Chih-Hsiang YANG
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Patent number: 8975620Abstract: An organic semiconductor device includes a carrier, a source, a drain, an organic semiconductor single-crystalline channel layer, an organic insulation layer and a gate. The source and the drain are disposed on an upper surface of the carrier. The source and the drain are disposed in parallel and a portion of the carrier is exposed between the source and the drain. The organic semiconductor single-crystalline channel layer is disposed on the upper surface of the carrier and covers a portion of the source, a portion of the drain and the portion of the carrier exposed by the source and the drain. The organic insulation layer covers the carrier, the source, the drain and the organic semiconductor single-crystalline channel layer. The gate is disposed on the organic insulation layer and corresponds to a position of the portion of the carrier exposed by the source and the drain.Type: GrantFiled: April 22, 2013Date of Patent: March 10, 2015Assignee: E Ink Holdings Inc.Inventors: Wei-Chou Lan, Hsing-Yi Wu, Ted-Hong Shinn
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Patent number: 8933563Abstract: A three-dimension circuit structure includes a substrate, a first conductive layer, a filled material and a second conductive layer. The substrate has an upper surface and a cavity located at the upper surface. The first conductive layer covers the inside walls of the cavity and protrudes out the upper surface. The filled material fills the cavity and covers the first conductive layer. The second conductive layer covers the filled material and a portion of the first conductive layer, and the first conductive layer and the second conductive layer encapsulate the filled material. The material of the filled material is different from that of the first conductive layer and the second conductive layer.Type: GrantFiled: August 13, 2012Date of Patent: January 13, 2015Assignee: E Ink Holdings Inc.Inventors: Wei-Chou Lan, Ted-Hong Shinn, Henry Wang, Chia-Chun Yeh
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Patent number: 8901565Abstract: A semiconductor device adapted for being disposed on a substrate is provided. The semiconductor device includes a pixel electrode, a drain, a semiconductor channel layer, a source, a gate insulation layer and a side-gate. The pixel electrode is disposed on the substrate. The drain is disposed on the pixel electrode and exposes a portion of pixel electrode. The semiconductor channel layer is disposed on the drain. The source is disposed on the semiconductor channel layer. The gate insulation layer is disposed on the substrate, at least covers the source and surrounds the semiconductor channel layer. The side-gate is disposed on the gate insulation layer and extendedly covers the substrate along at least one side of the gate insulation layer. An extending direction of a portion of the side-gate is identical to a stacking direction of the drain, the semiconductor channel layer and the source.Type: GrantFiled: September 13, 2013Date of Patent: December 2, 2014Assignee: E Ink Holdings Inc.Inventors: Wei-Chou Lan, Ted-Hong Shinn
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Patent number: 8901555Abstract: A light sensing device is disclosed. The light sensing device includes a first light sensor and a second light sensor. The first light sensor formed on a substrate includes a first metal oxide semiconductor layer for absorbing a first light having a first waveband. The second light sensor formed on the substrate includes a second metal oxide semiconductor layer and an organic light-sensitive layer on the second metal oxide semiconductor layer for absorbing a second light having a second waveband.Type: GrantFiled: July 17, 2012Date of Patent: December 2, 2014Assignee: E Ink Holdings Inc.Inventors: Chia-Chun Yeh, Henry Wang, Wei-Chou Lan, Ted-Hong Shinn
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Patent number: 8780146Abstract: An exemplary driving member and an exemplary array module formed by a plurality of the driving members are disclosed in the invention. The driving member includes a first suspending beam module, a second suspending beam module and a conductive suspending beam module. When a voltage is provided between the first suspending beam module and the second suspending beam module, or the first suspending beam module and the second suspending beam module are provided with two homopolar voltages, when the electric field force is larger than the deforming force threshold of the first suspending beam, the first suspending beam moves to contact with the conductive suspending beam module, so that the first suspending beam has a voltage same with the conductive suspending beam module. When the electric field force is smaller than the deforming force threshold of the first suspending beam, the first suspending beam module rebounds to an original state.Type: GrantFiled: August 26, 2010Date of Patent: July 15, 2014Assignee: E Ink Holdings Inc.Inventors: Sung-Hui Huang, Wei-Chou Lan, San-Long Lin
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Publication number: 20140151720Abstract: A semiconductor device adapted for being disposed on a substrate is provided. The semiconductor device includes a pixel electrode, a drain, a semiconductor channel layer, a source, a gate insulation layer and a side-gate. The pixel electrode is disposed on the substrate. The drain is disposed on the pixel electrode and exposes a portion of pixel electrode. The semiconductor channel layer is disposed on the drain. The source is disposed on the semiconductor channel layer. The gate insulation layer is disposed on the substrate, at least covers the source and surrounds the semiconductor channel layer. The side-gate is disposed on the gate insulation layer and extendedly covers the substrate along at least one side of the gate insulation layer. An extending direction of a portion of the side-gate is identical to a stacking direction of the drain, the semiconductor channel layer and the source.Type: ApplicationFiled: September 13, 2013Publication date: June 5, 2014Applicant: E Ink Holdings Inc.Inventors: Wei-Chou Lan, Ted-Hong Shinn