Abstract: A display device includes a substrate, an auxiliary electrode, a buffer layer, a plurality of active elements, and a plurality of light-emitting elements. The auxiliary electrode is disposed on the substrate and overlapped with an active region. The buffer layer is disposed on the auxiliary electrode. The plurality of active elements are disposed on the buffer layer and disposed in the active region. The plurality of light-emitting elements are electrically connected with the active elements, respectively. Each of the light-emitting elements includes a first electrode, a second electrode, and a light-emitting layer disposed between the first electrode and the second electrode. Each of the second electrodes is electrically connected with the auxiliary electrode.

Abstract: A display device includes a substrate, an auxiliary electrode, a buffer layer, a plurality of active elements, and a plurality of light-emitting elements. The auxiliary electrode is disposed on the substrate and overlapped with an active region. The buffer layer is disposed on the auxiliary electrode. The plurality of active elements are disposed on the buffer layer and disposed in the active region. The plurality of light-emitting elements are electrically connected with the active elements, respectively. Each of the light-emitting elements includes a first electrode, a second electrode, and a light-emitting layer disposed between the first electrode and the second electrode. Each of the second electrodes is electrically connected with the auxiliary electrode.

Abstract: A display panel is provided. A pixel array includes a plurality of first subpixels, a first source line coupled to the first subpixels, a plurality of second subpixels displaying the same with the first subpixels, and a second source line coupled to the second subpixels. A multiplexer circuit includes a first switch coupled between the first source line and a source driver and a second switch coupled between the second source line and the source driver. A first compensation capacitor couples between the first source line and a reference voltage, and a capacitance value thereof is related to a cut-off time point of the first switch. A second compensation capacitor couples between the second source line and the reference voltage, and a capacitance value thereof the second compensation capacitor is related to a cut-off time point of the second switch different from the cut-off time point of the second switch.

Abstract: A display panel is provided. A pixel array includes a plurality of first subpixels, a first source line coupled to the first subpixels, a plurality of second subpixels displaying the same with the first subpixels, and a second source line coupled to the second subpixels. A multiplexer circuit includes a first switch coupled between the first source line and a source driver and a second switch coupled between the second source line and the source driver. A first compensation capacitor couples between the first source line and a reference voltage, and a capacitance value thereof is related to a cut-off time point of the first switch. A second compensation capacitor couples between the second source line and the reference voltage, and a capacitance value thereof the second compensation capacitor is related to a cut-off time point of the second switch different from the cut-off time point of the second switch.

Abstract: A shift register includes a plurality of shift register circuits. Each of the shift register circuits includes a first switch, an input circuit, a pull-down circuit and a ripple reduction circuit. The first switch is used to output a scanning signal of the shift register circuit according to voltage levels of a node and a clock signal. The input circuit is used to pull up the voltage level of the node according to a scanning signal of a previous shift register circuit. The pull-down circuit is used to pull down the voltage levels of the node and the scanning signal of the shift register circuit according to a scanning signal of a following shift register circuit. The ripple reduction circuit is used to suppress ripples on the voltage levels of the node and the scanning signal caused by the coupling effect of the clock signal.

Abstract: A pixel driving circuit includes a light emitting diode (LED), a data writing unit, two transistors and two compensation units. The gate of the first transistor is coupled to the data writing unit for determining the current flow of the LED. The first compensation unit is coupled to the first transistor for providing a current path from the gate of the first transistor to a first voltage source and a current path from the gate of the first transistor to a second voltage source. The second compensation unit includes a first capacitor coupled to the gate of the first transistor for voltage coupling and providing a differential voltage that equals to the OLED to the gate of the first transistor. The second transistor is coupled between the first voltage source and a second voltage source for enabling or disabling the current flow between the first and second voltage sources.

Abstract: A light emitting diode module includes a light emitting unit and a light emitting diode circuit. The light emitting diode circuit includes four transistors and a storage capacitor. A first transistor includes a first end for receiving a data signal, and a control end. The storage capacitor has a first end coupled to a second end of the first transistor. A second transistor has a first end coupled to a first voltage source, and a control end. A third transistor has a first end coupled to a second end of the second transistor, and a control end coupled to a second end of the storage capacitor. A fourth transistor has a first end coupled to the second end of the storage capacitor, a control end, and a second end coupled to the second end of the second transistor.

Abstract: A pixel structure, including a data line, a scan line, at least one active device, a first auxiliary electrode, and a light emitting device, is provided. The at least one active device is electrically connected with the data line and the scan line, and each active device includes a gate, a channel layer, a source, and a drain. The first auxiliary electrode is electrically insulated from the active device. The light emitting device is disposed above the first auxiliary electrode, wherein the light emitting device includes a first electrode layer, a light emitting layer, and a second electrode layer. The first electrode layer is electrically connected with the first auxiliary electrode. The light emitting layer is disposed on the first electrode layer. The second electrode layer is disposed on the light emitting layer, wherein the second electrode layer is electrically connected with the active device.

Abstract: A pixel structure includes a light-emitting diode, a transistor, a data-receiving unit, a compensating unit, and a resetting unit. The transistor is configured to be electrically coupled to the light-emitting diode, and drive the light-emitting diode based on a voltage difference between the control terminal and the first terminal of the transistor. The data-receiving unit is configured to be electrically coupled to the first terminal of the transistor, and provide a pixel date signal to the first terminal of the transistor based on a first scan signal. The compensating unit is electrically coupled to the control terminal and the second terminal of the transistor to act as a current path therebetween. The resetting unit is electrically coupled to the light-emitting diode. The resetting unit is configured to respectively provide a reverse bias and reference voltage to the light-emitting diode and the control terminal of the transistor.

Abstract: An organic light emitting display unit structure including a first pixel, a second pixel adjacent to the first pixel, a first scan line electrically connected to the first pixel, a second scan line electrically connected to the second pixel, a data line, a power line, a sustaining signal line, a common reset signal line and a common light emitting signal line is provided. The power line and the sustaining signal line are respectively electrically connected to both of the first pixel and the second pixel. The data line intersects with the first scan line and the second scan line and is electrically connected to the first pixel and the second pixel. The common reset signal line and the common light emitting signal line are substantially disposed inside the first pixel and the second pixel respectively and are electrically connected to the first pixel and the second pixel.

Abstract: A pixel structure, including a data line, a scan line, at least one active device, a first auxiliary electrode, and a light emitting device, is provided. The at least one active device is electrically connected with the data line and the scan line, and each active device includes a gate, a channel layer, a source, and a drain. The first auxiliary electrode is electrically insulated from the active device. The light emitting device is disposed above the first auxiliary electrode, wherein the light emitting device includes a first electrode layer, a light emitting layer, and a second electrode layer. The first electrode layer is electrically connected with the first auxiliary electrode. The light emitting layer is disposed on the first electrode layer. The second electrode layer is disposed on the light emitting layer, wherein the second electrode layer is electrically connected with the active device.

Abstract: A shift register includes a plurality of shift register circuits. Each of the shift register circuits includes a first switch, an input circuit, a pull-down circuit and a ripple reduction circuit. The first switch is used to output a scanning signal of the shift register circuit according to voltage levels of a node and a clock signal. The input circuit is used to pull up the voltage level of the node according to a scanning signal of a previous shift register circuit. The pull-down circuit is used to pull down the voltage levels of the node and the scanning signal of the shift register circuit according to a scanning signal of a following shift register circuit. The ripple reduction circuit is used to suppress ripples on the voltage levels of the node and the scanning signal caused by the coupling effect of the clock signal.

Abstract: A pixel structure, including a data line, a scan line, at least one active device, a first auxiliary electrode, and a light emitting device, is provided. The at least one active device is electrically connected with the data line and the scan line, and each active device includes a gate, a channel layer, a source, and a drain. The first auxiliary electrode is electrically insulated from the active device. The light emitting device is disposed above the first auxiliary electrode, wherein the light emitting device includes a first electrode layer, a light emitting layer, and a second electrode layer. The first electrode layer is electrically connected with the first auxiliary electrode. The light emitting layer is disposed on the first electrode layer. The second electrode layer is disposed on the light emitting layer, wherein the second electrode layer is electrically connected with the active device.

Abstract: A pixel driving circuit includes a light emitting diode (LED), a data writing unit, two transistors and two compensation units. The gate of the first transistor is coupled to the data writing unit for determining the current flow of the LED. The first compensation unit is coupled to the first transistor for providing a current path from the gate of the first transistor to a first voltage source and a current path from the gate of the first transistor to a second voltage source. The second compensation unit includes a first capacitor coupled to the gate of the first transistor for voltage coupling and providing a differential voltage that equals to the OLED to the gate of the first transistor. The second transistor is coupled between the first voltage source and a second voltage source for enabling or disabling the current flow between the first and second voltage sources.

Abstract: A pixel structure, including a data line, a scan line, at least one active device, a first auxiliary electrode, and a light emitting device, is provided. The at least one active device is electrically connected with the data line and the scan line, and each active device includes a gate, a channel layer, a source, and a drain. The first auxiliary electrode is electrically insulated from the active device. The light emitting device is disposed above the first auxiliary electrode, wherein the light emitting device includes a first electrode layer, a light emitting layer, and a second electrode layer. The first electrode layer is electrically connected with the first auxiliary electrode. The light emitting layer is disposed on the first electrode layer. The second electrode layer is disposed on the light emitting layer, wherein the second electrode layer is electrically connected with the active device.

Abstract: A pixel includes an organic light-emitting diode, a driving transistor, a first switch, a third switch and a fourth switch. The driving transistor is electrically coupled to the organic light-emitting diode. When the pixel is in a data writing period, the first switch is configured to write a data voltage into a control terminal of the driving transistor. When the pixel is in a compensating period, a path between a control terminal and a first terminal of the fourth switch is established to charge or discharge the control terminal of the driving transistor through a current path, thereby forming a compensating voltage according to the voltage of the control terminal of the driving transistor. The driving transistor is turned on by the compensating voltage during a light emitting period, and the third switch is turned on such that a driving current is provided to the organic light emitting diode.

Abstract: A light emitting diode module includes a light emitting unit and a light emitting diode circuit. The light emitting diode circuit includes four transistors and a storage capacitor. A first transistor includes a first end for receiving a data signal, and a control end. The storage capacitor has a first end coupled to a second end of the first transistor. A second transistor has a first end coupled to a first voltage source, and a control end. A third transistor has a first end coupled to a second end of the second transistor, and a control end coupled to a second end of the storage capacitor. A fourth transistor has a first end coupled to the second end of the storage capacitor, a control end, and a second end coupled to the second end of the second transistor.

Abstract: An organic light emitting display unit structure including a first pixel, a second pixel adjacent to the first pixel, a first scan line electrically connected to the first pixel, a second scan line electrically connected to the second pixel, a data line, a power line, a sustaining signal line, a common reset signal line and a common light emitting signal line is provided. The power line and the sustaining signal line are respectively electrically connected to both of the first pixel and the second pixel. The data line intersects with the first scan line and the second scan line and is electrically connected to the first pixel and the second pixel. The common reset signal line and the common light emitting signal line are substantially disposed inside the first pixel and the second pixel respectively and are electrically connected to the first pixel and the second pixel.