Abstract: A physical vapor deposition (PVD) system includes: a pedestal configured to accommodate a semiconductor wafer; a cover plate above the pedestal configured to hold a target; and a collimator disposed above the pedestal and below the cover plate. The collimator has an upper surface and a lower surface. The lower surface is flat, and the upper surface is non-flat. A first thickness, in a vertical direction, of the collimator at a central portion is smaller than a second thickness, in the vertical direction, of the collimator at a peripheral portion.

Abstract: Semiconductor structures having low resistance via contacts and methods of fabricating the same are provided. An example semiconductor structure includes a substrate, a dielectric layer disposed over the substrate, a resistor disposed in the dielectric layer, and a resistor via contact disposed in the dielectric layer the resistor. The resistor via contact further includes a first layer disposed on and in contact with the resistor, a second layer disposed on the first layer, and a third layer disposed on the second layer. The first layer has a first thickness and includes a first material having a first resistivity, the second layer has a second thickness and includes a second material, and the third layer has a third thickness and includes a third material having a second resistivity. The first thickness is more than the third thickness, and the first resistivity is less than the second resistivity.

Abstract: A physical vapor deposition (PVD) system includes: a pedestal configured to accommodate a semiconductor wafer; a cover plate above the pedestal configured to hold a target; and a collimator disposed above the pedestal and below the cover plate. The collimator has an upper surface and a lower surface. The lower surface is flat, and the upper surface is non-flat. A first thickness, in a vertical direction, of the collimator at a central portion is smaller than a second thickness, in the vertical direction, of the collimator at a peripheral portion.

Abstract: A physical vapor deposition (PVD) system is disclosed. The PVD system includes a pedestal configured to hold a semiconductor wafer, a cover plate configured to hold a target, and a collimator between the pedestal and the cover plate. The collimator includes a plurality of passages configured to pass source material travelling from the cover plate toward the pedestal at an angle less than a threshold angle with respect to a line perpendicular to a surface of the pedestal facing the cover plate, where the collimator is configured to block source material travelling from the cover plate toward the pedestal at an angle greater than the threshold angle, where a first passage of the plurality of passages has a first passage length, where a second passage of the plurality of passages has a second passage length, and where the first passage length is less than the second passage length.

Abstract: A physical vapor deposition (PVD) system is disclosed. The PVD system includes a pedestal configured to hold a semiconductor wafer, a cover plate configured to hold a target, and a collimator between the pedestal and the cover plate. The collimator includes a plurality of passages configured to pass source material travelling from the cover plate toward the pedestal at an angle less than a threshold angle with respect to a line perpendicular to a surface of the pedestal facing the cover plate, where the collimator is configured to block source material travelling from the cover plate toward the pedestal at an angle greater than the threshold angle, where a first passage of the plurality of passages has a first passage length, where a second passage of the plurality of passages has a second passage length, and where the first passage length is less than the second passage length.

Abstract: Embodiments of mechanisms for forming a semiconductor device are provided. The semiconductor device includes a gate stack on a semiconductor substrate. In some embodiments, the semiconductor device further includes a semiconductor element, such as for example, a resistor, on the semiconductor substrate. The semiconductor device includes a metal silicide layer on at least one of the gate stack, the source region, and the drain region. The semiconductor device also includes a blocking region in a portion of the semiconductor element. In some embodiments, the blocking region includes first dopants and second dopants with an atomic radius smaller than that of the first dopants.

Abstract: Embodiments of mechanisms for forming a semiconductor device are provided. The semiconductor device includes a gate stack on a semiconductor substrate. In some embodiments, the semiconductor device further includes a semiconductor element, such as for example, a resistor, on the semiconductor substrate. The semiconductor device includes a metal silicide layer on at least one of the gate stack, the source region, and the drain region. The semiconductor device also includes a blocking region in a portion of the semiconductor element. In some embodiments, the blocking region includes first dopants and second dopants with an atomic radius smaller than that of the first dopants.