Patents by Inventor Wei Dou
Wei Dou has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240161689Abstract: The present disclosure provides a pixel driving circuit, a driving method thereof, and a display panel. A switching transistor and a sensing transistor are controlled with the same scanning line. In a detection stage, a voltage of a scanning signal line is adjusted to enable the sensing transistor to be turned on and the switching transistor to be turned off, so that a gate and a source of the driving transistor are in a floating state. A storage capacitor maintains a gate-source potential difference of the driving transistor to be stable, thereby it can accurately compensate for the mobility of the driving transistor.Type: ApplicationFiled: April 22, 2022Publication date: May 16, 2024Applicant: SHENZHEN CHINA STAR OPTOELECTRONICS SEMICONDUCTOR DISPLAY TECHNOLOGY CO., LTD.Inventor: Wei Dou
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Publication number: 20240145460Abstract: An integrated circuit includes a T-coil circuit, a silicon-controlled rectifier (SCR), and a signal-loss prevention circuit. The T-coil circuit is coupled to an input/output (I/O) pad and an internal circuit. The SCR is coupled to the T-coil circuit and the internal circuit. The signal-loss prevention circuit is coupled to the T-coil circuit and the SCR. The signal-loss prevention circuit includes a resistor coupled to the T-coil circuit and the SCR. An electrostatic current flows through the resistor and turns on the SCR. The signal-loss prevention circuit may also include a diode circuit coupled to the T-coil circuit and the SCR. The diode circuit is configured to prevent signal loss.Type: ApplicationFiled: January 3, 2024Publication date: May 2, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Wei-Min WU, Ming-Dou KER, Chun-Yu LIN, Li-Wei CHU
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Publication number: 20240105444Abstract: Methods for reducing contact resistance include performing a selective titanium silicide (TiSi) deposition process on a middle of the line (MOL) contact structure that includes a cavity in a substrate of dielectric material. The contact structure also includes a silicon-based connection portion at a bottom of the cavity. The selective TiSi deposition process is selective to silicon-based material over dielectric material. The methods also include performing a selective deposition process of a metal material on the MOL contact structure. The selective deposition process is selective to TiSi material over dielectric material and forms a silicide capping layer on the silicon-based connection portion. The methods further include performing a seed layer deposition process of the metal material on the contact structure.Type: ApplicationFiled: April 26, 2023Publication date: March 28, 2024Inventors: Jiang LU, Liqi WU, Wei DOU, Weifeng YE, Shih Chung CHEN, Rongjun WANG, Xianmin TANG, Yiyang WAN, Shumao ZHANG, Jianqiu GUO
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Patent number: 11937293Abstract: This disclosure relates generally to wireless communications and, more particularly, to systems and methods for determining an adaptive random access response window length in non-terrestrial networks. In one embodiment, a method performed by a communication device includes: receiving system information from a communication node, wherein the communication node communicates using a satellite in orbit or a high altitude platform station (HAPS); and determining an adaptive random access response window length based on the system information and whether the communication device has access to situation information that: characterizes a location of the communication device, an ephemeris of the satellite or a trajectory of the HAPS, and a payload type of the satellite or the HAPS.Type: GrantFiled: July 16, 2021Date of Patent: March 19, 2024Assignee: ZTE CORPORATIONInventors: Wei Cao, Zhen Yang, Nan Zhang, Jianwu Dou, Linxi Hu
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Publication number: 20240090064Abstract: Methods and systems for techniques for beam management in wireless networks are disclosed. In one example aspect, the method includes receiving, by a wireless device, a configuration from a network device, and initiating, by the wireless device, a process to recover a link to a network based on information elements within the configuration associated with different criteria.Type: ApplicationFiled: September 21, 2023Publication date: March 14, 2024Inventors: Nan ZHANG, Wei CAO, Jianwu DOU, Jianqiang DAI
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Publication number: 20240054949Abstract: The present disclosure discloses a pixel circuit and an external compensation method thereof. The external compensation method detects real-time source potentials of a driving transistor through n iterations, a single iterative detection time that can be set artificially to limit a time for each iteration to detect a real-time source potential of the driving transistor, until the real-time source potential of the driving transistor is equal to a target source potential, thereby improving threshold voltage detection efficiency of the driving transistor.Type: ApplicationFiled: October 11, 2021Publication date: February 15, 2024Inventors: Wei DOU, Taijiun HWANG
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Publication number: 20240044950Abstract: A threshold voltage detection method is provided by the present application. A driving current flowing through the driving transistor during a detection process can be constant by a new detection time sequence. A voltage of the drain electrode of the driving transistor is raised to a preset voltage within a detection time by iterating for multiple iterations by an iterative method, to acquire a target threshold voltage.Type: ApplicationFiled: December 22, 2021Publication date: February 8, 2024Applicant: SHENZHEN CHINA STAR OPTOELECTRONICS SEMICONDUCTOR DISPLAY TECHNOLOGY CO., LTD.Inventor: Wei Dou
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Publication number: 20230386833Abstract: Embodiments of the disclosure relate to methods for selectively removing metal material from the top surface and sidewalls of a feature. The metal material which is covered by a flowable polymer material remains unaffected. In some embodiments, the metal material is formed by physical vapor deposition resulting in a relatively thin sidewall thickness. Any metal material remaining on the sidewall after removal of the metal material from the top surface may be etched by an additional etch process. The resulting metal layer at the bottom of the feature facilitates selective metal gapfill of the feature.Type: ApplicationFiled: May 25, 2022Publication date: November 30, 2023Applicant: Applied Materials, Inc.Inventors: Liqi Wu, Feng Q. Liu, Bhaskar Jyoti Bhuyan, James Hugh Connolly, Zhimin Qi, Jie Zhang, Wei Dou, Aixi Zhang, Mark Saly, Jiang Lu, Rongjun Wang, David Thompson, Xianmin Tang
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Patent number: 11823599Abstract: A threshold voltage detecting method is disclosed in the present application. In the threshold voltage detecting method provided in the present application, a path between a driving transistor and a detecting circuit is shut down during detecting, so that a current flowing through the driving transistor in a detecting stage only needs to charge a storage capacitor, but does not need to charge a parasitic capacitor on the detecting circuit, thereby shortening a threshold voltage detecting time of the driving transistor, and further improving threshold voltage detecting efficiency of the driving transistor.Type: GrantFiled: October 28, 2021Date of Patent: November 21, 2023Assignee: SHENZHEN CHINA STAR OPTOELECTRONICS SEMICONDUCTOR DISPLAY TECHNOLOGY CO., LTD.Inventors: Wei Dou, Jing Xu
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Publication number: 20230120112Abstract: A threshold voltage detecting method is disclosed in the present application. In the threshold voltage detecting method provided in the present application, a path between a driving transistor and a detecting circuit is shut down during detecting, so that a current flowing through the driving transistor in a detecting stage only needs to charge a storage capacitor, but does not need to charge a parasitic capacitor on the detecting circuit, thereby shortening a threshold voltage detecting time of the driving transistor, and further improving threshold voltage detecting efficiency of the driving transistor.Type: ApplicationFiled: October 28, 2021Publication date: April 20, 2023Applicant: SHENZHEN CHINA STAR OPTOELECTRONICS SEMICONDUCTOR DISPLAY TECHNOLOGY CO., LTD.Inventors: Wei Dou, Jing Xu
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Publication number: 20220301828Abstract: Embodiments of methods and apparatus for reducing particle formation in physical vapor deposition (PVD) chambers are provided herein. In some embodiments, a method of reducing particle formation in a PVD chamber includes: performing a plurality of first deposition processes on a corresponding series of substrates disposed on a substrate support in the PVD chamber, wherein the PVD chamber includes a cover ring disposed about the substrate support and having a texturized outer surface, and wherein a silicon nitride (SiN) layer having a first thickness is deposited onto the texturized outer surface during each of the plurality of first deposition processes; and performing a second deposition process on the cover ring between subsets of the plurality of first deposition processes to deposit an amorphous silicon layer having a second thickness onto an underlying silicon nitride (SiN) layer.Type: ApplicationFiled: March 17, 2021Publication date: September 22, 2022Inventors: Wei DOU, Yong CAO, Mingdong LI, Shane LAVAN, Jothilingam RAMALINGAM, Chengyu LIU
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Patent number: 11450514Abstract: Embodiments of methods and apparatus for reducing particle formation in physical vapor deposition (PVD) chambers are provided herein. In some embodiments, a method of reducing particle formation in a PVD chamber includes: performing a plurality of first deposition processes on a corresponding series of substrates disposed on a substrate support in the PVD chamber, wherein the PVD chamber includes a cover ring disposed about the substrate support and having a texturized outer surface, and wherein a silicon nitride (SiN) layer having a first thickness is deposited onto the texturized outer surface during each of the plurality of first deposition processes; and performing a second deposition process on the cover ring between subsets of the plurality of first deposition processes to deposit an amorphous silicon layer having a second thickness onto an underlying silicon nitride (SiN) layer.Type: GrantFiled: March 17, 2021Date of Patent: September 20, 2022Assignee: APPLIED MATERIALS, INC.Inventors: Wei Dou, Yong Cao, Mingdong Li, Shane Lavan, Jothilingam Ramalingam, Chengyu Liu
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Publication number: 20150335670Abstract: A method for preparing a platelet aggregation inhibitor, a blood coagulation inhibitor, and a pharmaceutical composition or a food for preventing or treating thrombotic diseases, includes applying notoginsenoside Fc.Type: ApplicationFiled: January 9, 2014Publication date: November 26, 2015Inventors: Zhengtao Wang, Bo Gao, Li Yang, Xiaojun Wu, Wei Dou, Chunyong He, Qing Liu, Rufeng Wang, Eryun Zhang