Abstract: The present disclosure illustrates a circuit layout method for printed circuit board which is adapted for an electronic device. The circuit layout method includes the following steps. A parameters configuration interface is provided for receiving corresponding stack-up parameters and a plurality of layout parameters. A radio frequency layer, a first keep out layer, and a reference layer are determined based on the stack-up parameters. The first keep-out layer is placed between the radio frequency layer having a first signal trace disposed thereon and the reference layer. A first keep-out region on the first keep-out layer is formed in corresponding to the first signal trace. Circuit layouts disposed inside the first keep-out region are removed. Consequently, the corresponding keep-out region may be automatically generated in accordance to the signal requirements of the signal trace while designing the circuit layout thereby increase circuit layout quality and efficiency thereof.

Abstract: The present disclosure illustrates a circuit layout method for printed circuit board which is adapted for an electronic device. The circuit layout method includes the following steps. A parameters configuration interface is provided for receiving corresponding stack-up parameters and a plurality of layout parameters. A radio frequency layer, a first keep out layer, and a reference layer are determined based on the stack-up parameters. The first keep-out layer is placed between the radio frequency layer having a first signal trace disposed thereon and the reference layer. A first keep-out region on the first keep-out layer is formed in corresponding to the first signal trace. Circuit layouts disposed inside the first keep-out region are removed. Consequently, the corresponding keep-out region may be automatically generated in accordance to the signal requirements of the signal trace while designing the circuit layout thereby increase circuit layout quality and efficiency thereof.