Patents by Inventor Wei-Feng Wu
Wei-Feng Wu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250015095Abstract: Electronic devices are provided. The electronic device includes a substrate, a plurality of switching elements, a first sensing signal line, and a second sensing signal line. The substrate has a peripheral area. The plurality of switching elements is disposed on the substrate and is disposed in the peripheral area. The first sensing signal line is disposed on the substrate and is electrically connected to a first number of the plurality of switching elements. The second sensing signal line is disposed on the substrate and is electrically connected to a second number of the plurality of switching elements. Wherein, the plurality of switching elements is electrically connected to a common signal line, and the first number is different from the second number.Type: ApplicationFiled: June 5, 2024Publication date: January 9, 2025Inventors: Cheng-Shen PAN, Cheng-Min WU, Chien-Feng SHIH, Ming-Jhih CHEN, Cing-Hong CHEN, Wei-Fan TENG
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Patent number: 12167526Abstract: An extreme ultraviolet (EUV) photolithography system generates EUV light by irradiating droplets with a laser. The system includes a droplet generator with a nozzle and a piezoelectric structure coupled to the nozzle. The generator outputs groups of droplets. A control system applies a voltage waveform to the piezoelectric structure while the nozzle outputs the group of droplets. The waveform causes the droplets of the group to have a spread of velocities that results in the droplets coalescing into a single droplet prior to being irradiated by the laser.Type: GrantFiled: December 12, 2022Date of Patent: December 10, 2024Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Yu-Kuang Sun, Cheng-Hao Lai, Yu-Huan Chen, Wei-Shin Cheng, Ming-Hsun Tsai, Hsin-Feng Chen, Chiao-Hua Cheng, Cheng-Hsuan Wu, Yu-Fa Lo, Shang-Chieh Chien, Li-Jui Chen, Heng-Hsin Liu
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Patent number: 12148740Abstract: A display device is provided. The display device includes a substrate having a surface including a display area; a plurality of light-emitting diodes disposed on the display area of the substrate, wherein the light-emitting diode includes an electrode; and a plurality of bonding pads disposed on the substrate; a conductive element disposed between one of the plurality of bonding pads and the electrode of the at least one of the plurality of light-emitting diodes; and a first matrix element disposed on the substrate, wherein in a cross-sectional view, the first matrix element is disposed between adjacent two of the plurality of light-emitting diodes, and the electrode has a sidewall profile and at least a part of the sidewall profile of the electrode is in a shape of a curve.Type: GrantFiled: April 24, 2023Date of Patent: November 19, 2024Assignee: INNOLUX CORPORATIONInventors: Yuan-Lin Wu, Kuan-Feng Lee, Wei-Cheng Chu
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Publication number: 20240373627Abstract: Various embodiments of the present application are directed to an IC device and associated forming methods. In some embodiments, a memory region and a logic region are integrated in a substrate. A memory cell structure is disposed on the memory region. A plurality of logic devices disposed on a plurality of logic sub-regions of the logic region. A first logic device is disposed on a first upper surface of a first logic sub-region. A second logic device is disposed on a second upper surface of a second logic sub-region. A third logic device is disposed on a third upper surface of a third logic sub-region. Heights of the first, second, and third upper surfaces of the logic sub-regions monotonically decrease. By arranging logic devices on multiple recessed positions of the substrate, design flexibility is improved and devices with multiple operation voltages are better suited.Type: ApplicationFiled: July 17, 2024Publication date: November 7, 2024Inventors: Wei Cheng Wu, Li-Feng Teng
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Publication number: 20240373626Abstract: A semiconductor structure including a semiconductor substrate and at least one patterned dielectric layer is provided. The semiconductor substrate includes a semiconductor portion, at least one first device, at least one second device and at least one first dummy ring. The at least one first device is disposed on a first region surrounded by the semiconductor portion. The at least one second device and the at least one first dummy ring are disposed on a second region, and the second region surrounds the first region. The at least one patterned dielectric layer covers the semiconductor substrate.Type: ApplicationFiled: July 18, 2024Publication date: November 7, 2024Inventors: Meng-Han Lin, Te-Hsin Chiu, Wei-Cheng Wu, Li-Feng Teng, Chien-Hung Chang
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Publication number: 20240362470Abstract: The application provides a panoramic perception method, system and a non-transitory computer readable medium. The panoramic perception method comprises: performing a first pretraining on a plurality of weights of a training model using the source database; performing a second pretraining with data augmentation on the plurality of weights of the training model using the source database; performing a combined training on the plurality of weights of the training model using both the source database and the target database; performing a quantization-aware training on the plurality of weights of the training model using the source database and the target database; performing a post training quantization on the plurality of weights of the training model using the target database; and performing panoramic perception by the training model.Type: ApplicationFiled: October 3, 2023Publication date: October 31, 2024Inventors: Yu-Chen LU, Sheng-Feng YU, Wei-Cheng LIN, Chi-Chih CHANG, Pei-Shuo WANG, Kuan-Cheng LIN, Kai-Chiang WU
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Publication number: 20240365460Abstract: The present disclosure is directed to a modularized vessel droplet generator assembly (MGDVA) including a droplet generator assembly (DGA). Under a normal operation, the liquid fuel moves along an operation pathway extending through the DGA to eject or discharge the liquid fuel (e.g., liquid tin) from a nozzle of the DGA into a vacuum chamber. The liquid fuel in the vacuum chamber is then exposed to a laser generating an extreme ultra-violet (EUV) light. Under a service operation, the operation pathway is closed and a service pathway extending through the DGA is opened. A gas is introduced into the service pathway forming a gas-liquid interface between the gas and the liquid fuel. The gas-liquid interface is driven to an isolation valve directly adjacent to the DGA. In other words, the gas pushes back the liquid fuel to the isolation valve. Once the gas-liquid interface reaches the isolation valve, the isolation valve is closed isolating the DGA from the liquid fuel.Type: ApplicationFiled: July 11, 2024Publication date: October 31, 2024Inventors: Yu-Kuang SUN, Ming-Hsun TSAI, Wei-Shin CHENG, Cheng-Hao LAI, Hsin-Feng CHEN, Chiao-Hua CHENG, Cheng-Hsuan WU, Yu-Fa LO, Jou-Hsuan LU, Shang-Chieh CHIEN, Li-Jui CHEN, Heng-Hsin LIU
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Publication number: 20240365542Abstract: A semiconductor device includes a non-volatile memory. The non-volatile memory includes a first dielectric layer disposed on a substrate, a floating gate disposed on the dielectric layer, a control gate and a second dielectric layer disposed between the floating gate and the control gate. The second dielectric layer includes one of a silicon oxide layer, a silicon nitride layer, and a multi-layer thereof. The first dielectric layer includes a first-first dielectric layer formed on the substrate and a second-first dielectric layer formed on the first-first dielectric layer. The second-first dielectric layer includes a dielectric material having a dielectric constant higher than silicon nitride.Type: ApplicationFiled: July 5, 2024Publication date: October 31, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Wei-Cheng WU, Li-Feng TENG
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Publication number: 20240365461Abstract: The present disclosure is directed to a modularized vessel droplet generator assembly (MGDVA) including a droplet generator assembly (DGA). Under a normal operation, the liquid fuel moves along an operation pathway extending through the DGA to eject or discharge the liquid fuel (e.g., liquid tin) from a nozzle of the DGA into a vacuum chamber. The liquid fuel in the vacuum chamber is then exposed to a laser generating an extreme ultra-violet (EUV) light. Under a service operation, the operation pathway is closed and a service pathway extending through the DGA is opened. A gas is introduced into the service pathway forming a gas-liquid interface between the gas and the liquid fuel. The gas-liquid interface is driven to an isolation valve directly adjacent to the DGA. In other words, the gas pushes back the liquid fuel to the isolation valve. Once the gas-liquid interface reaches the isolation valve, the isolation valve is closed isolating the DGA from the liquid fuel.Type: ApplicationFiled: July 11, 2024Publication date: October 31, 2024Inventors: Yu-Kuang SUN, Ming-Hsun TSAI, Wei-Shin CHENG, Cheng-Hao LAI, Hsin-Feng CHEN, Chiao-Hua CHENG, Cheng-Hsuan WU, Yu-Fa LO, Jou-Hsuan LU, Shang-Chieh CHIEN, Li-Jui CHEN, Heng-Hsin LIU
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Patent number: 12127399Abstract: A semiconductor structure including a semiconductor substrate and at least one patterned dielectric layer is provided. The semiconductor substrate includes a semiconductor portion, at least one first device, at least one second device and at least one first dummy ring. The at least one first device is disposed on a first region surrounded by the semiconductor portion. The at least one second device and the at least one first dummy ring are disposed on a second region, and the second region surrounds the first region. The at least one patterned dielectric layer covers the semiconductor substrate.Type: GrantFiled: May 25, 2023Date of Patent: October 22, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Meng-Han Lin, Te-Hsin Chiu, Wei-Cheng Wu, Li-Feng Teng, Chien-Hung Chang
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Patent number: 12096621Abstract: Various embodiments of the present application are directed to an IC device and associated forming methods. In some embodiments, a memory region and a logic region are integrated in a substrate. A memory cell structure is disposed on the memory region. A plurality of logic devices disposed on a plurality of logic sub-regions of the logic region. A first logic device is disposed on a first upper surface of a first logic sub-region. A second logic device is disposed on a second upper surface of a second logic sub-region. A third logic device is disposed on a third upper surface of a third logic sub-region. Heights of the first, second, and third upper surfaces of the logic sub-regions monotonically decrease. By arranging logic devices on multiple recessed positions of the substrate, design flexibility is improved and devices with multiple operation voltages are better suited.Type: GrantFiled: February 24, 2022Date of Patent: September 17, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Wei Cheng Wu, Li-Feng Teng
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Patent number: 12096543Abstract: A method for using an extreme ultraviolet radiation source is provided. The method includes performing a lithography process using an extreme ultraviolet (EUV) radiation source; after the lithography processes, inserting an extraction tube into a vessel of the EUV radiation source; and cleaning a collector of the EUV radiation source by using the extraction tube.Type: GrantFiled: January 9, 2023Date of Patent: September 17, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Chiao-Hua Cheng, Hsin-Feng Chen, Yu-Fa Lo, Yu-Kuang Sun, Wei-Shin Cheng, Yu-Huan Chen, Ming-Hsun Tsai, Cheng-Hao Lai, Cheng-Hsuan Wu, Shang-Chieh Chien, Heng-Hsin Liu, Li-Jui Chen, Sheng-Kang Yu
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Publication number: 20240290786Abstract: Various embodiments of the present disclosure are directed towards a method to embed planar field-effect transistor (FETs) with fin field-effect transistors (finFETs). A semiconductor substrate is patterned to define a mesa and a fin. A trench isolation structure is formed overlying the semiconductor substrate and surrounding the mesa and the fin. A first gate dielectric layer is formed on the mesa, but not the fin. The trench isolation structure recessed around the fin, but not the mesa, after the forming the first gate dielectric layer. A second gate dielectric layer is deposited overlying the first gate dielectric layer at the mesa and further overlying the fin. A first gate electrode is formed overlying the first and second gate dielectric layers at the mesa and partially defining a planar FET. A second gate electrode is formed overlying the second gate dielectric layer at the fin and partially defining a finFET.Type: ApplicationFiled: May 9, 2024Publication date: August 29, 2024Inventors: Harry-Hak-Lay Chuang, Wei Cheng Wu, Li-Feng Teng, Li-Jung Liu
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Patent number: 12063734Abstract: The present disclosure is directed to a modularized vessel droplet generator assembly (MGDVA) including a droplet generator assembly (DGA). Under a normal operation, the liquid fuel moves along an operation pathway extending through the DGA to eject or discharge the liquid fuel (e.g., liquid tin) from a nozzle of the DGA into a vacuum chamber. The liquid fuel in the vacuum chamber is then exposed to a laser generating an extreme ultra-violet (EUV) light. Under a service operation, the operation pathway is closed and a service pathway extending through the DGA is opened. A gas is introduced into the service pathway forming a gas-liquid interface between the gas and the liquid fuel. The gas-liquid interface is driven to an isolation valve directly adjacent to the DGA. In other words, the gas pushes back the liquid fuel to the isolation valve. Once the gas-liquid interface reaches the isolation valve, the isolation valve is closed isolating the DGA from the liquid fuel.Type: GrantFiled: September 23, 2021Date of Patent: August 13, 2024Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Yu-Kuang Sun, Ming-Hsun Tsai, Wei-Shin Cheng, Cheng-Hao Lai, Hsin-Feng Chen, Chiao-Hua Cheng, Cheng-Hsuan Wu, Yu-Fa Lo, Jou-Hsuan Lu, Shang-Chieh Chien, Li-Jui Chen, Heng-Hsin Liu
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Patent number: 12058856Abstract: A semiconductor device includes a non-volatile memory. The non-volatile memory includes a first dielectric layer disposed on a substrate, a floating gate disposed on the dielectric layer, a control gate and a second dielectric layer disposed between the floating gate and the control gate. The second dielectric layer includes one of a silicon oxide layer, a silicon nitride layer and a multi-layer thereof. The first dielectric layer includes a first-first dielectric layer formed on the substrate and a second-first dielectric layer formed on the first-first dielectric layer. The second-first dielectric layer includes a dielectric material having a dielectric constant higher than silicon nitride.Type: GrantFiled: August 8, 2023Date of Patent: August 6, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Wei Cheng Wu, Li-Feng Teng
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Patent number: 10361961Abstract: A flow entry aggregation method of a network system includes classifying a plurality of flow entries into a plurality of partitions according to a plurality of indicators of the plurality of flow entries, wherein each flow entry utilizes ternary strings to represent at least one field of the flow entry and the plurality of indicators are utilized to indicating network requirements corresponding to the plurality of flow entries; and utilizing bit merging or subset merging to compress the flow entries in the same partition.Type: GrantFiled: March 25, 2016Date of Patent: July 23, 2019Assignees: Inventec (Pudong) Technology Corp., Inventec CorporationInventors: Tsung-Hsien Tsai, Kuo-Chen Wang, Wei-Feng Wu, Wei-Tso Tsai, Yu-Han Shih
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Publication number: 20180198719Abstract: A flow entry aggregation method of a network system includes classifying a plurality of flow entries into a plurality of partitions according to a plurality of indicators of the plurality of flow entries, wherein each flow entry utilizes ternary strings to represent at least one field of the flow entry and the plurality of indicators are utilized to indicating network requirements corresponding to the plurality of flow entries; and utilizing bit merging or subset merging to compress the flow entries in the same partition.Type: ApplicationFiled: March 25, 2016Publication date: July 12, 2018Inventors: Tsung-Hsien TSAI, Kuo-Chen WANG, Wei-Feng WU, Wei-Tso TSAI, Yu-Han SHIH
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Patent number: 9895940Abstract: The wheel includes a tire, a rim, two groups of supporting members. The tire is coupled to the rim. The groups of supporting members are oppositely positioned and received in the tire. Each group of supporting members are separately positioned from each other. The supporting members of each group are coupled to an inner surface of the tire by injection method. Central axes of the supporting members of each group are coincident or parallel. A central axis of each supporting member is coincident with or parallel to a central axis of a central axis of the tire.Type: GrantFiled: April 7, 2015Date of Patent: February 20, 2018Assignee: ScienBiziP Consulting (Shenzhen) Co., Ltd.Inventor: Wei-Feng Wu
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Patent number: 9739990Abstract: A mirror structure permitting an undistorted view of the blind spots of a vehicle include a first lens module and a second lens module. The first lens module is mounted on an A-pillar of a vehicle and located outside of the vehicle; the second lens module is opposite the first lens module and mounted inside of the vehicle on the A-pillar. The first lens module focuses light beams which would otherwise be blocked by the A-pillar of the vehicle and transmits the light beams to a front windshield of the vehicle, the light beam passing through the front windshield to reach the second lens module, the second lens module diffusing the light beams into the vision of a driver.Type: GrantFiled: December 29, 2014Date of Patent: August 22, 2017Assignees: HONG FU JIN PRECISION INDUSTRY (ShenZhen) CO., LTD., HON HAI PRECISION INDUSTRY CO., LTD.Inventor: Wei-Feng Wu
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Patent number: 9726264Abstract: A continuously variable transmission includes a housing, an input assembly, a driven assembly, an output assembly, and a speed changing rod. The input assembly, the driven assembly, and the output assembly are rotatably assembled to the housing. The input assembly includes a power input shaft and a first friction member fixedly sleeved on the power input shaft. The driven assembly is positioned oppositely to the input assembly. The driven assembly includes a rotation shaft and a second friction member fixedly sleeved on the rotation shaft. The output assembly includes a power output shaft and a rotational wheel non-rotatably sleeved on the power output shaft and engaging between the first friction member and the second friction member. Rotations of the first friction member and the second friction member rotate the power output shaft, a transmission ratio of continuously variable transmission is adjustable by moving the speed changing rod.Type: GrantFiled: December 31, 2014Date of Patent: August 8, 2017Assignees: HONG FU JIN PRECISION INDUSTRY (ShenZhen) CO., LTD., HON HAI PRECISION INDUSTRY CO., LTD.Inventor: Wei-Feng Wu