Abstract: A method for multi-link operation (MLO) is provided. The method for MLO may be applied to an apparatus. The method for MLO may include the following steps. A multi-chip controller of the apparatus may assign different data to a plurality of chips of the apparatus, wherein each chip corresponds to one link of multi-links. Each chip may determine whether transmission of the assigned data has failed. A first chip of the chips may transmit the assigned data to an access point (AP) in response to the first chip determining that the transmission of the assigned data has not failed.

Abstract: An optical element driving mechanism is provided and includes a fixed assembly, a movable assembly, a driving assembly and a stopping assembly. The fixed assembly has a main axis. The movable assembly is configured to connect an optical element, and the movable assembly is movable relative to the fixed assembly. The driving assembly is configured to drive the movable assembly to move relative to the fixed assembly. The stopping assembly is configured to limit the movement of the movable assembly relative to the fixed assembly within a range of motion.

Abstract: Method of manufacturing a semiconductor device, includes forming a protective layer over substrate having a plurality of protrusions and recesses. The protective layer includes polymer composition including polymer having repeating units of one or more of: Wherein a, b, c, d, e, f, g, h, and i are each independently H, —OH, —ROH, —R(OH)2, —NH2, —NHR, —NR2, —SH, —RSH, or —R(SH)2, wherein at least one of a, b, c, d, e, f, g, h, and i on each repeating unit is not H. R, R1, and R2 are each independently a C1-C10 alkyl group, a C3-C10 cycloalkyl group, a C1-C10 hydroxyalkyl group, a C2-C10 alkoxy group, a C2-C10 alkoxy alkyl group, a C2-C10 acetyl group, a C3-C10 acetylalkyl group, a C1-C10 carboxyl group, a C2-C10 alkyl carboxyl group, or a C4-C10 cycloalkyl carboxyl group, and n is 2-1000. A resist layer is formed over the protective layer, and the resist layer is patterned.

Abstract: An optoelectronic package and a method for producing the optoelectronic package are provided. The optoelectronic package includes a carrier, a photonic device, a first encapsulant and a second encapsulant. The photonic device is disposed on the carrier. The first encapsulant covers the carrier and is disposed around the photonic device. The second encapsulant covers the first encapsulant and the photonic device. The first encapsulant has a topmost position and a bottommost position, and the topmost position is not higher than a surface of the photonic device.

Abstract: A method for manufacturing a semiconductor device includes forming a photoresist layer comprising a photoresist composition over a substrate to form a photoresist-coated substrate. The photoresist layer is selectively exposed to actinic radiation to form a latent pattern in the photoresist layer. The latent pattern is developed by applying a developer to the selectively exposed photoresist layer to form a patterned photoresist layer exposing a portion of the substrate, and a purge gas is applied to the patterned photoresist layer.

Abstract: Systems and methods are described herein for the variable and dynamic control of a variable aperture masking unit to define, isolate and/or mask diffusion areas for dopant implantation and/or thermal annealing processes useful in wafer fabrication in the production of advanced semiconductor devices. A plurality of isolation material panels can be dynamically positioned to define a size, position and shape of a variable mask aperture between edges of the plurality of isolation material panels. The isolation material panels are connected between cooperating pairs of carriers that are coupled to and travel along a set of parallel tracks on opposite sides of the variable aperture masking unit.

Abstract: Systems and methods are described herein for the variable and dynamic control of a variable aperture masking unit to define, isolate and/or mask diffusion areas for dopant implantation and/or thermal annealing processes useful in wafer fabrication in the production of advanced semiconductor devices. A plurality of isolation material panels can be dynamically positioned to define a size, position and shape of a variable mask aperture between edges of the plurality of isolation material panels. The isolation material panels are connected between cooperating pairs of carriers that are coupled to and travel along a set of parallel tracks on opposite sides of the variable aperture masking unit.

Abstract: A FinFET device structure and method for forming the same are provided. The method includes forming a fin structure over a substrate and forming a dummy gate electrode over a middle portion of the fin structure. The method also includes forming a spacer layer on the dummy gate electrode and on the fin structure and performing a plasma doping process on the dummy gate electrode and on the spacer layer. The method further includes performing an annealing process, wherein the annealing process is performed by using a gas comprising oxygen, such that a doped region is formed in a portion of the fin structure, and the spacer layer is doped with oxygen after the annealing process.

Abstract: Systems and methods are described herein for the variable and dynamic control of a variable aperture masking unit to define, isolate and/or mask diffusion areas for dopant implantation and/or thermal annealing processes useful in wafer fabrication in the production of advanced semiconductor devices. A plurality of isolation material panels can be dynamically positioned to define a size, position and shape of a variable mask aperture between edges of the plurality of isolation material panels. The isolation material panels are connected between cooperating pairs of carriers that are coupled to and travel along a set of parallel tracks on opposite sides of the variable aperture masking unit.

Abstract: A processor socket assembly includes a processor socket, a base frame, a guide member and a carrier. The processor socket is located on a circuit board. The base frame surrounds the processor socket. The guide member is pivoted to an edge of the bottom frame to be rotatable relative to the processor socket, and the guide member has a slot. The carrier detachably engages the slot of the guide member after being combined with a processor and is capable of being rotated with the guide member.

Abstract: A multi-tube parallel heat spreader has at least three conduits disposed in parallel; a first connector fitted onto the first end of each conduit, with one side of the first connector configured with a first connecting plughole for the first end of each conduit to be inserted into, and a first connecting passage inside the first connector that is communicated to each first connecting plughole; a second connector fitted onto the second end of each conduit, with one side configured with a second connecting plughole for the second end of each conduit to be inserted into, and a second connecting passage inside the second connector that is communicated to each second connecting plughole; a working fluid contained in the vacuum interior of each conduit and the first and second connector; a heat conduction base abutting and combined with the conduits, including a heat conductive surface and a supporting surface.

Abstract: A FinFET device structure and method for forming the same are provided. The method includes forming a fin structure over a substrate and forming a dummy gate electrode over a middle portion of the fin structure. The method also includes forming a spacer layer on the dummy gate electrode and on the fin structure and performing a plasma doping process on the dummy gate electrode and on the spacer layer. The method further includes performing an annealing process, wherein the annealing process is performed by using a gas comprising oxygen, such that a doped region is formed in a portion of the fin structure, and the spacer layer is doped with oxygen after the annealing process.

Abstract: An interposer structure and a manufacturing method thereof are provided. The interposer structure includes a flexible substrate, a plurality of conductive pillars, a first patterned conductive layer, and a second patterned conductive layer. The flexible substrate includes a first surface and a second surface opposite to the first surface and has a plurality of through holes extending from the first surface to the second surface. A material of the flexible substrate is an insulator. The conductive pillars are disposed in the through holes. The first patterned conductive layer is disposed on the first surface of the flexible substrate and is electrically connected to the conductive pillars. The second patterned conductive layer is disposed on the second surface of the flexible substrate and is electrically connected to the conductive pillars.

Abstract: A light fixture includes a light emitting module for radiating and illuminating a preset illumination area with a fixed illuminance; a light sensor unit mounted on and in electrical communication with the light emitting module, including a light guiding pipe having a first end for guiding reflection light beam from the preset illumination area into the guiding pipe and a light sensor component mounted on a second end of the guiding pipe for measuring an illuminance of the reflection light beam guided into the guiding pipe in order to modulate the light emitting module based on the measured illuminance in such a manner that the light emitting module is capable of actively automatically controlling and maintaining the preset illumination area with the fixed illuminance.

Abstract: A light fixture includes a light emitting module for radiating and illuminating a preset illumination area with a fixed illuminance; a light sensor unit mounted on and in electrical communication with the light emitting module, including a light guiding pipe having a first end for guiding reflection light beam from the preset illumination area into the guiding pipe and a light sensor component mounted on a second end of the guiding pipe for measuring an illuminance of the reflection light beam guided into the guiding pipe in order to modulate the light emitting module based on the measured illuminance in such a manner that the light emitting module is capable of actively automatically controlling and maintaining the preset illumination area with the fixed illuminance.

Abstract: The disclosure provides a real-time wafer breakage detection method. The detection method includes the following operations. A wafer is positioned on a wafer holder of a process chamber in which a thermal process is being performed. Then, the temperature at the wafer holder is measured. And, a notification for corrective action is issued if the temperature is out of a predetermined alarm range.

Abstract: The disclosure provides a real-time wafer breakage detection method. The detection method includes the following operations. A wafer is positioned on a wafer holder of a process chamber in which a thermal process is being performed. Then, the temperature at the wafer holder is measured. And, a notification for corrective action is issued if the temperature is out of a predetermined alarm range.

Abstract: A system controls operating system images for a group of diskless servers and comprises an operating system builder, an operating system image manager and a run-time configuration and management tool. The operating system builder is configured to create a binary image of an operating system and modify components of the image by automated operation. The binary image is operative as common base operating system image for multiple servers. The operating system image manager discovers and manages a set of diskless servers in conjunction with a server manageability interface and a boot server. The run-time configuration and management tool for the diskless server set is configured for high-availability management, server and application health monitoring, and enforcing a security protocol between a network and a host server and individual diskless servers.

Abstract: Systems and methods are provided for substantially mitigating leakage current. One embodiment includes an integrated circuit (IC). The IC comprises a monitoring circuit configured to control switching of one of a first voltage source and a second voltage source to an output. The IC also comprises a leakage current protection circuit configured to substantially mitigate leakage current flow between the first voltage source and the second voltage source due to an undershoot condition caused by the switching between the first and second voltage sources to the output.

Abstract: Systems and methods are provided for substantially mitigating leakage current. One embodiment includes an integrated circuit (IC). The IC comprises a monitoring circuit configured to control switching of one of a first voltage source and a second voltage source to an output. The IC also comprises a leakage current protection circuit configured to substantially mitigate leakage current flow between the first voltage source and the second voltage source due to an undershoot condition caused by the switching between the first and second voltage sources to the output.