Patents by Inventor Wei-Hao Liao

Wei-Hao Liao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190363325
    Abstract: A device and a method for drying a battery separator membrane. The method is mainly by adding a drying device to provide a drying process prior to the lamination in the battery automated manufacturing process, so that in the process of sequentially, stacking the positive, negative electrode plates and the separator membrane in an interval into a battery cell, the drying device is used to continuously dry the separator membrane in advance to ensure that the moisture content of the separator membrane itself is effectively removed. The drying device mainly includes a closed space, and a plurality of sets of rollers at a certain distance from each other is arranged arbitrarily to make the long strip-shaped separator membrane wind around all the rollers to get a fully unfolded state. This couples with the introduction of continuous circulating wind into the closed space to blow the separator membrane to achieve the desired drying effect.
    Type: Application
    Filed: May 22, 2018
    Publication date: November 28, 2019
    Inventor: WEI HAO LIAO
  • Publication number: 20190363319
    Abstract: A battery pack stacking structure, whose components comprise a frame body, at least one or more battery cells and a housing. In particular, the frame body is rectangular, and a symmetrical combination structure is configured on the corresponding position of each corner around the periphery of the two opposite surfaces. The combination structure includes a convex portion on the same side surface and a concave portion on the other side surface, and the convex portion and the concave portion provide a combined pattern for mutual fitting, so that the plurality of frame bodies can be fitted by fitting the convex portion on the same side surface with the concave portion on the other side surface to freely extend the combination of a plurality of frame bodies.
    Type: Application
    Filed: May 22, 2018
    Publication date: November 28, 2019
    Inventor: WEI HAO LIAO
  • Publication number: 20190363390
    Abstract: An improved battery cell structure comprises an inner electrode plate having an inner electrode ear, an outer electrode plate having an outer electrode ear, and a partition plate superposed between the inner electrode plate and the outer electrode plate; the unique battery cell structure design rests on the external shape that can be regular or irregular, so that the inner electrode ear and the outer electrode ear can be arbitrarily configured according to the shape to fully utilize the space and easily install or accommodate in the space confined by the carrier. The stacked battery structure composed of plural sets of battery cell can effectively improve the battery efficiency.
    Type: Application
    Filed: May 22, 2018
    Publication date: November 28, 2019
    Inventor: WEI HAO LIAO
  • Publication number: 20190341543
    Abstract: A method includes forming in sequence a bottom magnetic layer, a tunnel barrier layer, a top magnetic layer, and a top electrode layer over a bottom electrode layer; performing a first etching process to recess the top electrode layer, in which the first etching process stops before the top magnetic layer is etched; performing a second etching process to pattern the top electrode layer as a top electrode and the top magnetic layer as a patterned top magnetic layer, in which the second etching process stops before the bottom magnetic layer is etched; forming a first spacer around the top electrode and the patterned top magnetic layer; and after forming the first spacer, performing a third etching process to pattern the tunnel barrier layer as a patterned tunnel barrier layer and the bottom magnetic layer as a patterned bottom magnetic layer.
    Type: Application
    Filed: July 15, 2019
    Publication date: November 7, 2019
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Wei-Hao LIAO, Chih-Wei LU, Hsi-Wen TIEN, Pin-Ren DAI, Chung-Ju LEE
  • Patent number: 10461246
    Abstract: A method for manufacturing a memory device is provided. The method includes forming a stack over a first portion of a bottom electrode layer, in which the stack comprises a resistance switching element and a top electrode over the resistance switching element; forming a first spacer around the resistance switching element; forming a penetration barrier layer around the resistance switching element; and removing a second portion of the bottom electrode layer using an etch operation, in which the penetration barrier layer has higher resistance to penetration of an etchant used in the etch operation than that of the first spacer.
    Type: Grant
    Filed: September 16, 2017
    Date of Patent: October 29, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chih-Wei Lu, Hsi-Wen Tien, Wei-Hao Liao, David Dai, Chung-Ju Lee
  • Patent number: 10355198
    Abstract: A memory device includes an MTJ structure and a first metal residue. The MTJ structure includes a top surface having a first width, a bottom surface having a second width greater than the first width, and a stepped sidewall structure between the top surface and the bottom surface. The stepped sidewall structure includes a first sidewall, a second sidewall, and an intermediary surface connecting the first sidewall to the second sidewall. The first metal residue is in contact with the first sidewall and not in contact with the second sidewall.
    Type: Grant
    Filed: November 13, 2017
    Date of Patent: July 16, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Wei-Hao Liao, Chih-Wei Lu, Hsi-Wen Tien, Pin-Ren Dai, Chung-Ju Lee
  • Publication number: 20190164781
    Abstract: A method for forming an interconnect structure is provided. The method includes: forming a dielectric layer on a substrate, and forming an opening in the dielectric layer; forming a first metal layer, a second metal layer, and a third metal layer sequentially over the dielectric layer. The opening of the dielectric layer is filled with the first metal layer to form a conductive via. The method also includes: performing one or multiple etch operation to etch the first metal layer, the second metal layer, and the third metal layer, so as to form a metal line corresponding to the first metal layer, an intermediate metal layer corresponding to the second metal layer, and a metal pillar corresponding to the third metal layer. In particular, the width of the metal line is greater than the width of the metal pillar.
    Type: Application
    Filed: November 30, 2017
    Publication date: May 30, 2019
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Hsi-Wen TIEN, Wei-Hao LIAO, Chih-Wei LU, Pin-Ren DAI, Chung-Ju LEE
  • Publication number: 20190165256
    Abstract: A method for forming a semiconductor device is provided. The method includes: providing a semiconductor substrate; forming a bottom electrode layer over the semiconductor substrate; forming a magnetic tunneling junction (MTJ) layer over the bottom electrode layer; forming a top electrode layer over the MTJ layer; and performing a single etch operation to etch the bottom electrode layer, the MTJ layer, and the top electrode layer, thereby forming a bottom electrode, a MTJ, and a top electrode respectively.
    Type: Application
    Filed: November 29, 2017
    Publication date: May 30, 2019
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Hsi-Wen TIEN, Wei-Hao LIAO, Pin-Ren DAI, Chih-Wei LU, Chung-Ju LEE
  • Publication number: 20190165259
    Abstract: A method for fabricating a memory device includes forming a bottom electrode over a substrate; forming an etch stop layer over and surrounding the bottom electrode; removing at least one portion of the etch stop layer to expose the bottom electrode; forming a stack layer over the bottom electrode and a remaining portion of the etch stop layer, the stack layer comprising a resistance switching layer; and etching the stack layer to form a stack over the bottom electrode, the stack comprising a resistance switching element over the bottom electrode and a top electrode over the resistance switching element, wherein the etch stop layer has a higher etch resistance to the etching than that of the resistance switching element.
    Type: Application
    Filed: January 2, 2018
    Publication date: May 30, 2019
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Wei-Hao LIAO, Hsi-Wen TIEN, Chih-Wei LU, Pin-Ren DAI, Chung-Ju LEE
  • Publication number: 20190148623
    Abstract: A memory device includes an MTJ structure and a first metal residue. The MTJ structure includes a top surface having a first width, a bottom surface having a second width greater than the first width, and a stepped sidewall structure between the top surface and the bottom surface. The stepped sidewall structure includes a first sidewall, a second sidewall, and an intermediary surface connecting the first sidewall to the second sidewall. The first metal residue is in contact with the first sidewall and not in contact with the second sidewall.
    Type: Application
    Filed: November 13, 2017
    Publication date: May 16, 2019
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Wei-Hao LIAO, Chih-Wei LU, Hsi-Wen TIEN, Pin-Ren DAI, Chung-Ju LEE
  • Publication number: 20190148633
    Abstract: The present disclosure describes a method utilizing an ion beam etch process, instead of a RIE etch process, to form magnetic tunnel junction (MTJ) structures. For example, the method includes forming MTJ structure layers on an interconnect layer, where the interconnect layer includes a first area and a second area. The method further includes depositing a mask layer over the MTJ structure layers in the first area and forming masking structures over the MTJ structure layers in the second area. The method also includes etching with an ion beam etch process, the MTJ structure layers between the masking structures to form MTJ structures over vias in the second area of the interconnect layer; and removing, with the ion beam etch process, the mask layer, the top electrode, the MTJ stack, and a portion of the bottom electrode in the first area of the interconnect layer.
    Type: Application
    Filed: September 5, 2018
    Publication date: May 16, 2019
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Pin-Ren DAI, Chung-Ju LEE, Chung-Te LIN, Chih-Wei LU, Hsi-Wen TIEN, Tai-Yen PENG, Chien-Min LEE, Wei-Hao LIAO
  • Publication number: 20190148631
    Abstract: A method for manufacturing a memory device, the method includes forming an opening in a dielectric layer; overfilling the opening with a bottom electrode layer; removing a first portion of the bottom electrode layer outside the opening, while leaving a second portion of the bottom electrode layer in the opening to form a bottom electrode; and forming a stack over the bottom electrode, the stack comprising a resistance switching element in contact with the bottom electrode and a top electrode over the resistance switching element.
    Type: Application
    Filed: November 14, 2017
    Publication date: May 16, 2019
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Hsi-Wen TIEN, Chih-Wei LU, Wei-Hao LIAO, Pin-Ren DAI, Chung-Ju LEE
  • Patent number: 10270028
    Abstract: A method for manufacturing a memory device, the method includes forming an opening in a dielectric layer; overfilling the opening with a bottom electrode layer; removing a first portion of the bottom electrode layer outside the opening, while leaving a second portion of the bottom electrode layer in the opening to form a bottom electrode; and forming a stack over the bottom electrode, the stack comprising a resistance switching element in contact with the bottom electrode and a top electrode over the resistance switching element.
    Type: Grant
    Filed: November 14, 2017
    Date of Patent: April 23, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Hsi-Wen Tien, Chih-Wei Lu, Wei-Hao Liao, Pin-Ren Dai, Chung-Ju Lee
  • Publication number: 20190088863
    Abstract: A method for manufacturing a memory device is provided. The method includes forming a stack over a first portion of a bottom electrode layer, in which the stack comprises a resistance switching element and a top electrode over the resistance switching element; forming a first spacer around the resistance switching element; forming a penetration barrier layer around the resistance switching element; and removing a second portion of the bottom electrode layer using an etch operation, in which the penetration barrier layer has higher resistance to penetration of an etchant used in the etch operation than that of the first spacer.
    Type: Application
    Filed: September 16, 2017
    Publication date: March 21, 2019
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chih-Wei LU, Hsi-Wen TIEN, Wei-Hao LIAO, David DAI, Chung-Ju LEE
  • Publication number: 20150166881
    Abstract: A packaging material is provided including a transparent insulating material, a wavelength-converting material and a hydrophobic light-scattering material. The wavelength-converting material and the hydrophobic light-scattering material are mixed in the transparent insulating material. An LED packaging structure containing the packaging material is also provided herein.
    Type: Application
    Filed: July 21, 2014
    Publication date: June 18, 2015
    Inventors: Min-Ya CHAN, Chen-Chi MA, Sheng-Tsung HSIAO, Wei-Hao LIAO
  • Patent number: 8887574
    Abstract: A measurement system for measuring a pressure of a fluid is provided. The measurement system includes a sensing module and a liquid electrical circuit. The sensing module includes a flexible film and a liquid electronic device. The flexible film has a first side and a second side opposite to the first side. The fluid is disposed on the first side of the flexible film, and the liquid electronic device is disposed on the second side of the flexible film. The flexible film converts the pressure of the fluid into a parameter of the liquid electronic device. The liquid electrical circuit is electrically coupled to the liquid electronic device. The liquid electronic device and the liquid electrical circuit output a measurement signal corresponding to the parameter in response to an applied electrical energy. A manufacture method of a measurement system is also provided.
    Type: Grant
    Filed: December 8, 2011
    Date of Patent: November 18, 2014
    Assignee: Academia Sinica
    Inventors: Yi-Chung Tung, Chueh-Yu Wu, Wei-Hao Liao
  • Publication number: 20140142000
    Abstract: The present invention relates to a microfluidic array platform comprising a substrate and two layers between which one membrane is sandwiched, wherein a plurality of cell culture wells are constructed in the top layer and one or more microfluidic channels for oxygen scavenging reactions or/and oxygen generating reactions to control the oxygen tensions are constructed in the bottom player. The microfluidic array platform is capable of simultaneously performing cell culture under different oxygen tensions and compatible with existing cell incubators and high-throughput instruments for cost-effective setup and straightforward operation.
    Type: Application
    Filed: October 21, 2013
    Publication date: May 22, 2014
    Applicant: ACADEMIA SINICA
    Inventors: Yi-Chung Tung, Chien-Chung Peng, Hsiu-Chen Shih, Wei-Hao Liao
  • Publication number: 20130019688
    Abstract: A measurement system for measuring a pressure of a fluid is provided. The measurement system includes a sensing module and a liquid electrical circuit. The sensing module includes a flexible film and a liquid electronic device. The flexible film has a first side and a second side opposite to the first side. The fluid is disposed on the first side of the flexible film, and the liquid electronic device is disposed on the second side of the flexible film. The flexible film converts the pressure of the fluid into a parameter of the liquid electronic device. The liquid electrical circuit is electrically coupled to the liquid electronic device. The liquid electronic device and the liquid electrical circuit output a measurement signal corresponding to the parameter in response to an applied electrical energy. A manufacture method of a measurement system is also provided.
    Type: Application
    Filed: December 8, 2011
    Publication date: January 24, 2013
    Inventors: Yi-Chung TUNG, Chueh-Yu Wu, Wei-Hao Liao