Abstract: A method includes providing a first plate including a first surface, a second surface opposite to the first surface, and a first recess indented from the first surface towards the second surface; providing a semiconductor structure including a third surface, a fourth surface opposite to the third surface, and a first sidewall extending between the third surface and the fourth surface; placing the semiconductor structure over the first plate; and disposing a priming material over the third surface of the semiconductor structure, wherein a peripheral portion of the fourth surface of the semiconductor structure is in contact with the first surface of the first plate upon the disposing of the priming material.

Abstract: A method for manufacturing a semiconductor device includes obtaining a first image of a fluid dispense nozzle using a first camera, the fluid dispense nozzle configured to dispense fluid on a semiconductor substrate, obtaining a second image of the fluid dispense nozzle using a second camera, the second image having a higher resolution than the first image, determining a width of the fluid dispense nozzle at multiple intervals along the fluid dispense nozzle and a width of a spray pattern of a fluid being dispensed from the fluid dispense nozzle at multiple intervals along the spray pattern, fitting a first straight line to a series of data points representing a plurality of widths of the intervals along the fluid dispense nozzle and a plurality of widths of the intervals along the spray pattern, determining a first slope of the first straight line, and determining a condition of the spray pattern and the fluid dispense nozzle based on the first slope.

Abstract: A method includes providing a first plate including a first surface, a second surface opposite to the first surface, and a first recess indented from the first surface towards the second surface; providing a semiconductor structure including a third surface, a fourth surface opposite to the third surface, and a first sidewall extending between the third surface and the fourth surface; placing the semiconductor structure over the first plate; and disposing a priming material over the third surface of the semiconductor structure, wherein a peripheral portion of the fourth surface of the semiconductor structure is in contact with the first surface of the first plate upon the disposing of the priming material.

Abstract: An in-memory computing memory device is disclosed. The memory device comprises an array of memory cells, a plurality of word lines, a plurality of bit lines, (M+1) input circuits, a wordline driver and an evaluation circuitry. The array is divided into (M+1) lanes and each lane comprises P memory cell columns and an input circuit. The input circuit in each lane charges a predefined bit line with a default amount of charge proportional to an input synapse value and then distributes the default amount of charge to the other second bit lines with a predefined ratio based on a constant current. The evaluation circuitry couples a selected number of the bit lines to an accumulate line and convert an average voltage at the accumulate line into a digital value in response to a set of (M+1) input synapse values and the activated word line.

Abstract: A wafer alignment apparatus includes a light source, a light detection device, and a rotation device configured to rotate a wafer. The light source is configured to provide a light directed to the wafer. The light detection device is configured to detect reflected light intensity from the wafer to locate at least one wafer alignment mark of wafer alignment marks separated by a plurality of angles. At least two of those angles are equal.

Abstract: Present disclosure provides a substrate processing apparatus, including a rotatable pedestal configured to hold a substrate, a driving mechanism connected to the rotatable pedestal, a liquid pouring nozzle over the pedestal, a temperature sensor configured to probe a temperature of the substrate processing apparatus, and a controller communicating with the temperature sensor and the driving mechanism. Present disclosure also provides a method for processing a substrate, including providing a substrate on a pedestal of a processing chamber, probing a temperature of the processing chamber, calculating a temperature difference between the temperature of the processing chamber and a predetermined temperature, and determining a rotational speed difference with respect to a predetermined rotational speed of the pedestal according to the temperature difference.

Abstract: A method includes providing a first plate including a first surface, a second surface opposite to the first surface, and a first recess indented from the first surface towards the second surface; providing a semiconductor structure including a third surface, a fourth surface opposite to the third surface, and a first sidewall extending between the third surface and the fourth surface; placing the semiconductor structure over the first plate; and disposing a priming material over the third surface of the semiconductor structure, wherein a peripheral portion of the fourth surface of the semiconductor structure is in contact with the first surface of the first plate upon the disposing of the priming material.

Abstract: A method for manufacturing a semiconductor structure is provided. The method includes the following operations. A first semiconductor substrate is provided on a spin chuck. A first humidity factor near the first semiconductor substrate is obtained. A resist material is dispensed on the first semiconductor substrate. The spin chuck is rotated at a first speed. The first speed is determined based on the first humidity factor.

Abstract: A wafer alignment apparatus includes a light source, a light detection device, and a rotation device configured to rotate a wafer. The light source is configured to provide a light directed to the wafer. The light detection device is configured to detect reflected light intensity from the wafer to locate at least one wafer alignment mark of wafer alignment marks separated by a plurality of angles. At least two of those angles are equal.

Abstract: An integrated circuit applied in a deep neural network is disclosed. The integrated circuit comprises at least one processor, a first internal memory, a second internal memory, at least one MAC circuit, a compressor and a decompressor. The processor performs a cuboid convolution over decompression data for each cuboid of an input image fed to any one of multiple convolution layers. The MAC circuit performs multiplication and accumulation operations associated with the cuboid convolution to output a convoluted cuboid. The compressor compresses the convoluted cuboid into one compressed segment and store it in the second internal memory. The decompressor decompresses data from the second internal memory segment by segment to store the decompression data in the first internal memory. The input image is horizontally divided into multiple cuboids with an overlap of at least one row for each channel between any two adjacent cuboids.

Abstract: A method for manufacturing a semiconductor structure is provided. The method includes the following operations. A first semiconductor substrate is provided on a spin chuck. A first humidity factor near the first semiconductor substrate is obtained. A resist material is dispensed on the first semiconductor substrate. The spin chuck is rotated at a first speed. The first speed is determined based on the first humidity factor.

Abstract: A wafer alignment apparatus includes a light source, a light detection device, and a rotation device configured to rotate a wafer. The light source is configured to provide a light directed to the wafer. The light detection device is configured to detect reflected light intensity from the wafer to locate at least one wafer alignment mark of wafer alignment marks separated by a plurality of angles. At least two of those angles are equal.

Abstract: An in-memory computing memory device is disclosed. The memory device comprises an array of memory cells, a plurality of word lines, a plurality of bit lines, (M+1) input circuits, a wordline driver and an evaluation circuitry. The array is divided into (M+1) lanes and each lane comprises P memory cell columns and an input circuit. The input circuit in each lane charges a predefined bit line with a default amount of charge proportional to an input synapse value and then distributes the default amount of charge to the other second bit lines with a predefined ratio based on a constant current. The evaluation circuitry couples a selected number of the bit lines to an accumulate line and convert an average voltage at the accumulate line into a digital value in response to a set of (M+1) input synapse values and the activated word line.

Abstract: A digital modulating device includes an oscillator that generates an oscillation signal, and a frequency doubling modulator that includes: a single-ended to differential converter converting the oscillation signal into two periodic signals; two inductors respectively receiving the periodic signals and respectively providing two input signals; a switching circuit; and two amplifier circuits. When the switching circuit operates in a first state, the amplifier circuits respectively amplify the input signals to respectively generate two amplified signals that are combined into a combined signal at a common node thereof. When the switching circuit operates in a second state, the amplifier circuits do not perform amplification.

Abstract: Present disclosure provides a substrate processing apparatus, including a rotatable pedestal configured to hold a substrate, a driving mechanism connected to the rotatable pedestal, a liquid pouring nozzle over the pedestal, a temperature sensor configured to probe a temperature of the substrate processing apparatus, and a controller communicating with the temperature sensor and the driving mechanism. Present disclosure also provides a method for processing a substrate, including providing a substrate on a pedestal of a processing chamber, probing a temperature of the processing chamber, calculating a temperature difference between the temperature of the processing chamber and a predetermined temperature, and determining a rotational speed difference with respect to a predetermined rotational speed of the pedestal according to the temperature difference.

Abstract: A digital modulating device includes an oscillator that generates an oscillation signal, and a frequency doubling modulator that includes: a single-ended to differential converter converting the oscillation signal into two periodic signals; two inductors respectively receiving the periodic signals and respectively providing two input signals; a switching circuit; and two amplifier circuits. When the switching circuit operates in a first state, the amplifier circuits respectively amplify the input signals to respectively generate two amplified signals that are combined into a combined signal at a common node thereof. When the switching circuit operates in a second state, the amplifier circuits do not perform amplification.

Abstract: A wafer alignment apparatus includes a light source, a light detection device, and a rotation device configured to rotate a wafer. The light source is configured to provide a light directed to the wafer. The light detection device is configured to detect reflected light intensity from the wafer to locate at least one wafer alignment mark of wafer alignment marks separated by a plurality of angles. At least two of those angles are equal.

Abstract: A wafer alignment apparatus includes a light source, a light detection device, and a rotation device configured to rotate a wafer. The light source is configured to provide light directed to the wafer. The light detection device is configured to detect reflected light intensity from the wafer to locate at least one wafer alignment mark of wafer alignment marks separated by a plurality of angles. At least two of those angles are equal.

Abstract: A wafer alignment apparatus includes a light source, a light detection device, and a rotation device configured to rotate a first wafer and a second wafer. The light source is configured to provide a first light directed to the first wafer and a second light directed to the second wafer. The light detection device is configured to detect reflected light intensity from the first wafer to find a position of at least one wafer alignment mark of the first wafer and to detect reflected light intensity from the second wafer to find a position of at least one wafer alignment mark of the second wafer.

Abstract: A wafer alignment apparatus includes a light source, a light detection device, and a rotation device configured to rotate a first wafer and a second wafer. The light source is configured to provide a first light directed to the first wafer and a second light directed to the second wafer. The light detection device is configured to detect reflected light intensity from the first wafer to find a position of at least one wafer alignment mark of the first wafer and to detect reflected light intensity from the second wafer to find a position of at least one wafer alignment mark of the second wafer.