Patents by Inventor Wei-Hsien Lee

Wei-Hsien Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240128420
    Abstract: A display panel including a circuit board, a plurality of bonding pads, a plurality of light emitting devices, and a plurality of solder patterns is provided. The bonding pads are disposed on the circuit board, and each includes a first metal layer and a second metal layer. The second metal layer is located between the first metal layer and the circuit board. The first metal layer includes an opening overlapping the second metal layer. A material of the first metal layer is different from a material of the second metal layer. The light emitting devices are electrically bonded to the bonding pads. Each of the solder patterns electrically connects one of the light emitting devices and one of the bonding pads. The solder patterns each contact the second metal layer through the opening of the first metal layer of one of the bonding pads to form a eutectic bonding.
    Type: Application
    Filed: December 6, 2022
    Publication date: April 18, 2024
    Applicant: AUO Corporation
    Inventors: Chia-Hui Pai, Tai-Tso Lin, Wen-Hsien Tseng, Wei-Chieh Chen, Kuan-Yi Lee, Chih-Chun Yang
  • Patent number: 11955439
    Abstract: A semiconductor package includes a semiconductor die, a redistribution structure and connective terminals. The redistribution structure is disposed on the semiconductor die and includes a first metallization tier disposed in between a pair of dielectric layers. The first metallization tier includes routing conductive traces electrically connected to the semiconductor die and a shielding plate electrically insulated from the semiconductor die. The connective terminals include dummy connective terminals and active connective terminals. The dummy connective terminals are disposed on the redistribution structure and are electrically connected to the shielding plate. The active connective terminals are disposed on the redistribution structure and are electrically connected to the routing conductive traces. Vertical projections of the dummy connective terminals fall on the shielding plate.
    Type: Grant
    Filed: January 17, 2023
    Date of Patent: April 9, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Wei-Cheng Wu, Chien-Chia Chiu, Cheng-Hsien Hsieh, Li-Han Hsu, Meng-Tsan Lee, Tsung-Shu Lin
  • Publication number: 20240093416
    Abstract: A sewing machine includes a main body and a quick release needle plate module. The main body includes a base seat having an inner frame, and an outer case that is mounted to the inner frame and that defines an accommodating compartment. The quick release needle plate module includes a catch member, and a needle plate that covers the accommodating compartment, that is detachably pivoted to a rear section of the inner frame, and that engages the catch member. The quick release needle plate module further includes a press member inserted through the outer case and the inner frame, and operable to push the catch member to disengage the catch member. The needle plate has a plate body that covers the accommodating compartment, and a resilient member mounted between the inner frame and the plate body for driving pivot action of the plate body away from the inner frame.
    Type: Application
    Filed: January 20, 2023
    Publication date: March 21, 2024
    Applicant: ZENG HSING INDUSTRIAL CO., LTD.
    Inventors: Kun-Lung HSU, Ming-Ta LEE, Wei-Chen CHEN, Po-Hsien TSENG
  • Patent number: 7713802
    Abstract: This invention relates to a method of sulfuration treatment for InAlAs/InGaAs metamorphic high electron mobility transistor (MHEMT), and the sulfuration treatment is applied to the InAlAs/InGaAs MHEMT for a passivation treatment for Gate, in order to increase initial voltage, lower the surface states and decrease surface leakage current, which makes the MHEMT work in a range of high current density and high input power.
    Type: Grant
    Filed: March 12, 2007
    Date of Patent: May 11, 2010
    Assignee: Chang Gung University
    Inventors: Hsien-Chin Chiu, Liann-Be Chang, Yuan-Chang Huang, Chung-Wen Chen, Wei-Hsien Lee
  • Publication number: 20080318372
    Abstract: This invention relates to a method for making a high-linearity and high-power CMOS structure and particularly to a field plate technology that is applied to a CMOS component, in which the field plate is formed on a dielectric layer of the CMOS, being arranged above a gate and a drain. An electric field is provided to significantly improve the RF linearity and output power of the CMOS component.
    Type: Application
    Filed: August 27, 2008
    Publication date: December 25, 2008
    Inventors: Hsien-Chin Chiu, Chien-Cheng Wei, Wei-Hsien Lee, Wu-Shiung Feng
  • Publication number: 20080227246
    Abstract: This invention relates to a method of sulfuration treatment for InAlAs/InGaAs metamorphic high electron mobility transistor (MHEMT), and the sulfuration treatment is applied to the InAlAs/InGaAs MHEMT for a passivation treatment for Gate, in order to increase initial voltage, lower the surface states and decrease surface leakage current, which makes the MHEMT work in a range of high current density and high input power.
    Type: Application
    Filed: March 12, 2007
    Publication date: September 18, 2008
    Applicant: CHANG GUNG UNIVERSITY
    Inventors: Hsien-Chin Chiu, Liann-Be Chang, Yuan-Chang Huang, Chung-Wen Chen, Wei-Hsien Lee
  • Publication number: 20080157210
    Abstract: This invention relates to a high-linearity and high-power CMOS structure and a method for the same and particularly to a field plate technology that is applied to a CMOS component, in which the field plate is formed on a dielectric layer of the CMOS, being arranged above a gate and a drain. An electric field is provided to significantly improve the RF linearity and output power of the CMOS component.
    Type: Application
    Filed: December 27, 2006
    Publication date: July 3, 2008
    Applicant: Chang Gung University
    Inventors: Hsien-Chin Chiu, Chien-Cheng Wei, Wei-Hsien Lee, Wu-Shiung Feng
  • Patent number: D436920
    Type: Grant
    Filed: June 1, 2000
    Date of Patent: January 30, 2001
    Assignee: Aten International Co., Ltd.
    Inventor: Wei-Hsien Lee
  • Patent number: D436924
    Type: Grant
    Filed: June 1, 2000
    Date of Patent: January 30, 2001
    Assignee: Aten International Co., Ltd.
    Inventor: Wei-Hsien Lee
  • Patent number: D445092
    Type: Grant
    Filed: May 24, 2000
    Date of Patent: July 17, 2001
    Assignee: Aten International Co., Ltd.
    Inventor: Wei-Hsien Lee
  • Patent number: D445764
    Type: Grant
    Filed: May 24, 2000
    Date of Patent: July 31, 2001
    Assignee: Aten International Co., Ltd.
    Inventor: Wei-Hsien Lee
  • Patent number: D459308
    Type: Grant
    Filed: June 1, 2000
    Date of Patent: June 25, 2002
    Assignee: Aten International Co., Ltd.
    Inventor: Wei-Hsien Lee
  • Patent number: D435519
    Type: Grant
    Filed: May 24, 2000
    Date of Patent: December 26, 2000
    Assignee: Aten International Co., Ltd.
    Inventor: Wei-Hsien Lee